CODEWITHSUNDEEP
genericsvhdl
Elle
Elle

Reputation: 334

usage of VHDL generics

I'm learning VHDL and I haven't understood yet how to properly use generics. Let's assume that I need to describe different multiplexers using a 2:1 MUX with variable number of bits. Let's call this parameter p. This is an example code (this code doesn't matter that much in this context tbh )

library ieee;
use ieee.std_logic_1164.all;

entity mux2to1_gen is
generic ( p : POSITIVE := 1 );    
port ( 
       x,y : in std_logic_vector ( p-1 downto 0 );  
       s : in std_logic;    
       m : out std_logic_vector ( p-1 downto 0 )
);
end mux2to1_gen;


architecture logic of mux2to1_gen is
     signal s_vector : std_logic_vector ( p-1 downto 0 );   
begin
     s_vector <= ( others => s ); 
     m <= (NOT (s_vector) AND x) OR (s_vector AND y);   
end architecture;

I'd like to use this code to easily create a 2:1 8bit MUX, i.e. p = 8 or maybe a 5:1 MUX using four 2:1 MUX on 1 bit. So basically, I want to create another file and easily use this code only declaring the value of p in the first case and just something more in the second one. How do I do that?

Upvotes: 2

Views: 1461

Answers (1)

Jim Lewis
Jim Lewis

Reputation: 3973

All the magic happens in the instance (component or entity). Assuming you have already done a component declaration, at the place where you want to create your different size multiplexors:

-- Create 8:1 Mux
Mux8_1 : mux2to1_gen 
  generic map (p => 8 )
  port map (x => A8, y => B8, s => Mux8Sel, m => MuxOut8) ; 

-- Create 5:1 Mux
Mux5_1 : mux2to1_gen 
  generic map (p => 5 )
  port map (x => X5, y => Y5, s => Mux5Sel, m => MuxOut5) ;

The above used the generally preferred method of named association. You can also positionally associate the ports as shown below, however, this makes designs harder to maintain and review. Keep in mind, most code is written by one person, but reviewed by numerous (including the person who does the next revision), so while named association increases the effort of design capture, it decreases the overall effort. 

-- Create 8:1 Mux
Mux8_1 : mux2to1_gen 
  generic map (8 )
  port map (A8, B8, Mux8Sel, MuxOut8) ;

Upvotes: 5

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