CODEWITHSUNDEEP
makefile
Cyan
Cyan

Reputation: 13968

Makefile pattern rule limitation

Consider the following simplified Makefile :

target :
    (recipe)

target-mt : (add some flags)
target-mt : target

This example works as intended : make target-mt add a few flags and proceeds with compiling target.

Now, since the *-mt pattern happens quite often, with always the same flags, I want to make this effort common. So let's simplify with a Makefile pattern rule : 

target :
    (recipe)

%-mt : (add some flags)

target-mt : target

This works as intended, and now all later *-mt targets receive the same additional set of flags. Now, notice that the dependency of something-mt is always something. So I'm tempted to generalize this relation even more : 

target :
    (recipe)

%-mt : (add some flags)
%-mt : %

This one doesn't work.

make: *** No rule to make target `target-mt'.  Stop.

This seems at odd with general formulation of pattern rules, such as the canonical example : 

%.o : %.c
    $(CC) -c $(CFLAGS) $(CPPFLAGS) $< -o $@

I presume there must be a reason for this failure, and I presume it might be related to the fact that the dependency is a pure %, not something more defined like %.c. But I couldn't find anything related to such a restriction in the documentation (linked above).

Questions are :

1) Is there an explanation for this behavior ?

2) Is there another way to achieve the same objective ?

Upvotes: 0

Views: 37

Answers (1)

MadScientist
MadScientist

Reputation: 100906

You can't declare a pattern rule with no recipe. Or rather, you can, but it doesn't do what you want here: instead it cancels the pattern rule.

You could add a dummy recipe, like this:

%-mt: % ; @:

(: is a shell no-op operator).

Or you could just not use this and go back to the way it was. It's a little hard to understand the full context from this limited example.

Upvotes: 1

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