CODEWITHSUNDEEP
assemblymips
abumandour
abumandour

Reputation: 1369

What should be the behavior if I try to load a word from an address that is not 4-aligned in Mips?

I'm building a Mips assembler and as of its state right now, It tolerates instructions such as lw $s0, 3($sp), which I find somewhat counter-intuitive for me, as I don't know whether the processor tolerates this or it cannot load for example 1 byte from a word and the other 3 bytes from another word.

In other words, should I deal with the data as it is an array of words(two-dimensional array) so I can only address words that are 4-aligned, or a one-dimensional array that has all the bytes one after the other, in which I can access any 4 consecutive bytes and cram them into a register?

Upvotes: 1

Views: 103

Answers (1)

Erik Eidt
Erik Eidt

Reputation: 26766

A MIPS processor should fault on misaligned addresses, but it is not the assembler's job to determine that.

A warning might be reasonable, but technically, at build time, you can seldom know or predict what is in the register.  An offset of 3 is legal and can work, with lw or sw, if the address in the register is also odd.

Also, the programmer might be trying to cause a fault — you never know.

The point being that the instruction has a valid encoding and the assembler should translate the text into that machine code.

Upvotes: 2

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