CODEWITHSUNDEEP
associative-arraysystem-verilog
Mohan
Mohan

Reputation: 141

System Verilog Associative Array

Is it possible to define a associated array of different element types - something like below ?

typedef enum {M1, M2} mod_t;
typedef struct {...} m1_reg_t;
typedef struct {...} m2_reg_t;

array[mod_t] = {
   M1: { string name;
         m1_reg_t cfg
       }
   M2: { string name;
         m2_reg_t cfg;
         int m2_indx;
       }
}

Upvotes: 0

Views: 955

Answers (1)

dave_59
dave_59

Reputation: 42673

No, all arrays must have the same element type.

If you really want an array with just two elements of a different type, use another struct instead of an array.

typedef struct { 
         string name;
         m1_reg_t cfg;
       } M1_t;
typedef struct { 
         string name;
         m2_reg_t cfg;
         int m2_indx;
       } M2_t;
struct { M1_t M1;
         M2_t M2;
} opcodes;

But if you are looking for an array of many elements where each element might hold a different opcode, consider a dynamic array of tagged unions.

typedef union tagged {
   struct { 
             string name;
             m1_reg_t cfg;
           } M1;
   struct { 
             string name;
             m2_reg_t cfg;
             int m2_indx;
           } M2;
} opcode_t;

opcode_t opcodes[];

Accessing tagged unions requires pattern matching statements. See section 12.6 in the 1800-2017 LRM.

Upvotes: 1

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