Reputation: 11
From what I understand, the interrupts are enabled by using the below approach :
The steps 1) through 9) are followed in a general EXTI programming.
There are two sides for enabling and clearing the interrupt :
Upvotes: 0
Views: 1466
Reputation: 67820
It is the same with all other peripheral registers. The clear path is not important from the programmer point of view. The important is information how to clear the bit.
Clear the bit you need to clear bit EXTI PR register.
Clearing sometimes happen indirectly (for example by reading the data register in some communication registers). Some peripherals have special registers only for clearing the pending bit. Example: DMA
Everything is in the Reference Manual.
Clearing the flag in the peripheral register deasserts the interrupt line coming to NVIC form peripheral.
Upvotes: 0