CODEWITHSUNDEEP
pythonlinuxubuntuwindows-subsystem-for-linuxpygears
Stefan Sredojevic
Stefan Sredojevic

Reputation: 67

PyGears is not generating output HDL files

This is the code I run, and it's not generating output HDL files:

from pygears import gear
from pygears.typing import Ufixp, Uint
from pygears.sim import call
from pygears.lib import drv, collect


@gear
def gain(din: Uint[8], *, val) -> Uint[8]:
    return din * Ufixp[0, 8](val)

res = []

drv_din = drv(t=Uint[8],seq=[3,2,5])

gain(drv_din, val=0.5, __sim__='verilator') \
    | collect(result=res)

Upvotes: 1

Views: 68

Answers (1)

Bogdan Vukobratovic
Bogdan Vukobratovic

Reputation: 161

PyGears will only generate HDL files when necessary for the simulation or when directly instructed to do so via hdlgen() function (see an example below). In your case you did specify that the gain module should be simulated using Verilator HDL simulator, but you never called the simulator to execute. In other words, you need to call the sim() function at the end of your script, which you should import like this: from pygears import sim

However, when PyGears is not given a folder where to store the files, it will automatically create one inside the Temporary folder of your OS (/tmp for Ubuntu). In order to generate files local to the script, you should specify it via resdir argument of the sim() function:

from pygears import gear
from pygears.typing import Ufixp, Uint
from pygears.sim import sim
from pygears.lib import drv, collect


@gear
def gain(din: Uint[8], *, val) -> Uint[8]:
    return din * Ufixp[0, 8](val)


res = []

drv_din = drv(t=Uint[8], seq=[3, 2, 5])

gain(drv_din, val=0.5, __sim__='verilator') \
    | collect(result=res)

sim(resdir='./output')

On the other hand, if you are only interested in HDL files, than you need not run the simulation, you can just call hdlgen() directly (which is also called under the hood in the previous example):

from pygears import gear, Intf
from pygears.typing import Ufixp, Uint
from pygears.hdl import hdlgen


@gear
def gain(din: Uint[8], *, val) -> Uint[8]:
    return din * Ufixp[0, 8](val)


gain(Intf(Uint[8]), val=0.5)

hdlgen('/gain', outdir='./output')

Notice how I removed all the verification components (drv(), collect(), etc.) since I am not simulating anything with this script. This was just to provide a minimal example, and hdlgen() could have been called within the first example with all the verification components present.

Upvotes: 1

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