CODEWITHSUNDEEP
assemblymips
user14572697
user14572697

Reputation:

How MIPS assembler acquires immediate (CONSTANT) values?

I couldn't find similar question anywhere. For example when we want to add a predefined value in memory we get its address and copy its content but if we want to add 40000 to a register how assembler interprets 40000 and copies its value. Thank you if help me understand this concept

Upvotes: 0

Views: 691

Answers (2)

old_timer
old_timer

Reputation: 71526

unsigned int fun0 ( void )
{
    return 40000;
}
unsigned int fun1 ( void )
{
    return 0x40000;
}
unsigned int fun2 ( void )
{
    return 0x12345678;
}
unsigned int fun3 ( void )
{
    return 0x12340000;
}
unsigned int fun4 ( void )
{
    return 0x00005678;
}

Disassembly of section .text:

00000000 <fun0>:
   0:   03e00008    jr  $31
   4:   34029c40    li  $2,0x9c40 ; 0x34xxxxxx ORI $2,$0,0x9c40

00000008 <fun1>:
   8:   03e00008    jr  $31
   c:   3c020004    lui $2,0x4

00000010 <fun2>:
  10:   3c021234    lui $2,0x1234
  14:   03e00008    jr  $31
  18:   24425678    addiu   $2,$2,22136

0000001c <fun3>:
  1c:   03e00008    jr  $31
  20:   3c021234    lui $2,0x1234

00000024 <fun4>:
  24:   03e00008    jr  $31
  28:   24025678    li  $2,22136  ; 0x24xxxxxx  ADDIU $2,$0,0x5678


unsigned int fun5 ( void )
{
    return 0x9999;
}
00000000 <fun5>:
   0:   03e00008    jr  $31
   4:   34029999    li  $2,0x9999  ; 0x34xxxxxx  ORI $2,$0,0x9999

li is a pseudo instruction.

Upvotes: 1

Michael
Michael

Reputation: 58447

The value is encoded directly into the instruction word.

For example, the instruction ADDI rs,rt,immediate has the following encoding:

         001000   rs   rt  immediate
#bits:     6       5    5      16

So the immediate constant would be placed in the 16 least-significant bits of the instruction word. Note that the immediate is sign-extended, so it can only encode values in the range -32768..+32767. So you can't add 40000 to a register with a single instruction, unless you already happen to have the value 40000 in some register.

For more information, see the document MIPS32™ Architecture For Programmers Volume II: The MIPS32™ Instruction Set.

Upvotes: 2

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