user786
user786

Reputation: 4364

Rx descriptor dma mapping in device driver what that actually means, Does it mean mapping of packets at physical NIC to struct object in memory

I am going through realtek r8169 driver and but kind of stuck in this line

    tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES,
                     &tp->RxPhyAddr, GFP_KERNEL);

From the book Linux device driver, it just says it is ...Function handles both the allocation and the mapping of the buffer, ...arguments are device structure and the size of buffer needed

What does that mean: allocation I could understanding but what is it mean by mapping

does this mean that what ever I have in pdev represented device's rx descriptor that same I will have in what returns from dma_alloc_coherent which is tp->RxDescArray a descriptor as a software object? tp->RxDescArray is of type RxDesc in the driver which is like following

    struct RxDesc {
        __le32 opts1;
        __le32 opts2;
        __le64 addr;
     };

if this is what mapping is: means whatever I have in pdev represented device rx decriptor on physical device that same I will have in software object tp->RxDescArray is that what mapping means. then who define the structure of RxDesc, is this something included in datasheet. If it does then under which section? There are numerous sections in a datasheet. should it be more clearer `

Update Also like to know what does this line does

  tp->RxDescArray[NUM_RX_DESC - 1].opts1 |= cpu_to_le32(RingEnd);

tp->RxDescArray is of type RxDesc (not array of RxDesc) does this statement mark the end of variable RxDescArray means what every next will happen will after that end address

Update 2

I need info on if I have a datasheet lets say from intel E1000E driver, or r8169 driver from RealTek, then how I create create Rx Descrptor structure, in above code it does something like this

    struct RxDesc {
    __le32 opts1;
    __le32 opts2;
    __le64 addr;
     }

what is opts1, opts2 and addr? how author of this driver got this idea of creating this structure. Only he had was datasheet with many hex values

Upvotes: 0

Views: 682

Answers (2)

prl
prl

Reputation: 12435

DMA accesses are translated by the IOMMU, which on Intel systems is described in the Intel® Virtualization Technology for Directed I/O (VT-d) specification.

The function dma_alloc_coherent allocates memory and introduces a mapping into the DMA page tables so that the memory is accessible to the device. The address returned is not the virtual or physical address of the memory, but is a I/O virtual address (IOVA), which the device can use to access memory. The IOVA is translated by the IOMMU into the physical memory address when the device performs DMA.

The IOMMU prevents any device from accessing physical memory that hasn't been mapped into that specific device's I/O address space.

Upvotes: 3

hkall
hkall

Reputation: 36

RingEnd marks the end of the ring buffer for the NIC. So that NIC DMA engine knows where to jump to the start of the ring buffer.

Upvotes: 0

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