CODEWITHSUNDEEP
vhdl
Snowman94
Snowman94

Reputation: 1

Error. Can't write to interface object "Compare_out" of mode IN

I am getting this error but i can't see why i shouldn't be able to write the values to compare_out. does the error code mean that the program sees compare_out as a input? or is it something in the if statement that isn't working?

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity compare is


port
(
    -- Input ports
    set_val : in  std_logic_vector(7 downto 0);
    try_val : in  std_logic_vector(7 downto 0);
    try     : in    std_logic;
    
    
    -- Output ports
    compare_out : std_logic_vector(1 downto 0)
);
end compare;


architecture compare_impl of compare is
begin

C1: process(try, try_val, set_val)
  begin
        if try = '1' and try_val = set_val then
            compare_out <= "01"; -- equal  then 
                
        elsif try = '1' and try_val < set_val then
                compare_out <= "00";    -- higher
                    
        elsif try = '1' and (try_val > set_val) then
                compare_out <= "11"; -- lower
                     
            else
            compare_out <= "10"; -- nothing
        
        end if;
  end process C1;
end compare_impl;

Upvotes: 0

Views: 224

Answers (1)

Tricky
Tricky

Reputation: 4516

compare_out does not have a mode specified. In VHDL, ports without a direction specified default to mode in. You need to explicity write:

compare_out : out std_logic_vector(1 downto 0)

Upvotes: 1

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