CODEWITHSUNDEEP
c++makefilegnu-make
Razorte
Razorte

Reputation: 3

Makefile compile with list of .cpp

It's possible to compile a list of .cpp with make ? In my makefile i have 2 lists, one of .o and the second is for .cpp. The list of the .o is the same of .cpp with different path. I can't use vpath because i have multiple .cpp with same names.

I can browse the .o but not the .cpp:

$(OBJS): $(SRC)
     $(LINKER) -g -o $@ $^ $(LDFLAGS)

In this case, my .cpp is the same for all .o.

$(OBJS) is the list of .o and $(SRC) the .cpp

Example of Makefile:

COMPILATEUR=g++
LINKER=g++
LDFLAGS=
CFLAGS=-Og
PATH_BUILD=$(pwd)/Build/
EXE=Bidou

INCLUDES= -I"AAA/BBB" \
    -I"AAA/BBB/CC/dd"

SRC= AAA/BBB/CC/dd.cpp \
     AAA/BBB/hh.cpp \
     AAA/BBB/CC/dd/ee.cpp \
     AAA/BBB/cc.cpp

OBJS:= $(addprefix $(PATH_BUILD)/,$(notdir $(SRC:%.cpp=%.o)))

$(OBJS): $(SRC)
    @mkdir -p $(PATH_BUILD)
    @echo "\n##$<"
    $(COMPILATEUR) $(INCLUDES) $(CFLAGS) "$<" -g -c -o $@

$(EXE): $(OBJS)
    $(LINKER) -g -o $@ $^ $(LDFLAGS)

clean:
    rm -fr $(PATH_BUILD)

Upvotes: 0

Views: 504

Answers (1)

MadScientist
MadScientist

Reputation: 101131

That rule is... really wrong. The target(s) are object files, but the recipe you're using is a link command that generates an executable, not compile command that generates an object file.

There's really not much we can do to help you unless we know the contents of the SRC and OBJS variables.

If, for example, it's a fact that all the object files have identical paths to the source files just with the extension changed from .cpp to .o, then you don't even need to define a rule to build those object files: make has a rule that will do that built in; you can just write:

program: $(OBJS)
        $(LINKER) -g -o $@ $^ $(LDFLAGS)

(if the name of the program you wanted to create from the object files is program).

ETA

If there's no algorithmic way to reliably convert from an object file name to a single known source file, then there's no way you can write a pattern rule that will do the job.

That means you'll have to write out all the dependency relationships by hand. You can do something like this:

$(OBJS) :
        @mkdir -p $(@D)
        @echo "\n##$<"
        $(COMPILATEUR) $(INCLUDES) $(CFLAGS) "$<" -g -c -o $@

$(for S,$(SRCS),$(eval $(PATH_BUILD)/$(notdir $(S:%.cpp=%.o)): $S))

This creates a way to build each object file, then writes a separate set of dependencies for each .o file depending on its related .c file.

Upvotes: 1

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