Reputation: 1
I am trying to use the assembly instruction "vcvt.s32.f32 q8, q8, #0xf" in an ARM Cortex M4-F using the Arm Keil IDE and the compiler versions v5 and v6.
Unfortunately, this instruction is not recognized by the compiler. When I write C code, the compiler uses other slower assembly instructions in place of this one; If I directtly write the assembly instruction, it is not accepted by the compiler leading to a compiling error.
Does anyone know anything about it?
This instruction looks present in the ARM M4-F ISA, but currently I am not able to make it works!
Upvotes: 0
Views: 1164
Reputation: 364210
It assembles with the GNU assembler using arm-none-eabi-as -mfpu=neon -mcpu=cortex-m4 -mthumb foo.s
in case that helps.
But not with -mcpu=cortex-m4 -mfpu=vfpv4
.
Wikipedia says that the optional FPU on M4 is VFPv4-SP (single precision), which I think also implies that it's not full NEON. Tom V also confirms in comments that Cortex-M4-F doesn't support this NEON SIMD instruction.
Keil is correct -
Cortex-M4-F doesn't support vcvt.s32.f32
for q
or d
registers, only for s
registers.
The following does assemble ok with
arm-none-eabi-as -mfpu=vfpv4 -mcpu=cortex-m4 -mthumb
:
vcvt.s32.f32 s8, s8, #0xf
vcvt.s32.f32 s9, s9, #0xf
vcvt.s32.f32 s10, s10, #0xf
vcvt.s32.f32 s11, s11, #0xf
Upvotes: 1