CODEWITHSUNDEEP
iox86portreal-modememory-mapped-io
Aryan Kumar
Aryan Kumar

Reputation: 35

What exactly is memory mapped io and port based io

Well I have some confusions about memory mapped io and port based io. Questions are:-

  1. In port based io if I write to a port will it affect the corresponding memory address or not and vise versa.
  2. Does x86 uses port based io or memory mapped io.(I think it is motherboard dependent and x86 can use both, correct me if I am wrong).
  3. In memory mapped io there are some problems related to cache, what are those problems?
  4. Can we use both types of io on a device?
  5. How is DMA used in context with hdd?

Thanks in advance.

Upvotes: 1

Views: 1357

Answers (2)

puppydrum64
puppydrum64

Reputation: 1688

In port based io if I write to a port will it affect the corresponding memory address or not and vise versa.

No. A port is accessed with an in/out instruction, it doesn't have a "memory address" that the CPU can see.

mov dx,03C4h
mov al,02h
out dx,al

mov al, byte ptr [03C4h] ; this isn't going to make AL = 2 necessarily.

To make things even more confusing, a value written to a memory-mapped IO port doesn't always change the value at that address either! It's very common for certain IO ports to have different behavior on read vs. write.

For example, many game consoles have a memory-mapped IO port that can be read to tell you which row of pixels on is being drawn right now. But if you write to that address, it doesn't cause the video chip to start drawing at that line immediately. Rather, it tells it "I want an interrupt to occur at the Xth row of pixels" where X is the value written to the port. In other words, reading this address and writing to it represent two totally different things. C compilers don't really understand this as a concept and will try to optimize out behavior where you do something that would otherwise be pointless, like read from a memory address you just wrote to. Which is pointless for normal memory, but not for memory-mapped IO. The volatile keyword when applied to a variable prevents C from optimizing out reads or writes to it. This might relate to your question about caching, but I'm not sure exactly.

In order to know what will or won't happen, you need to be familiar with the platform you're working on. Most of them are well-documented, but every once in a while you'll have some ambiguous edge cases where you're not sure what will happen.

In memory mapped io there are some problems related to cache, what are those problems?

That I'm not entirely sure. I think there can be a problem where you try to read from one of these ports and since it's cached you're reading a previous value you didn't intend.

Upvotes: 0

Peter Cordes
Peter Cordes

Reputation: 363999

IO space (in / out) is a separate address-space from physical memory, including in modern PCI / PCIe devices. It depends on the device how you need to talk to it; modern devices usually only (or mostly) have MMIO registers (in physical address space), because MMIO is more efficient than port IO.

Parts of physical address space containing MMIO registers should be set as uncacheable in your MTRR or PAT; apparently CPUs don't support cacheable memory types at all for MMIO, and can lock up if you try. (You can use WC write-combining memory for stuff like VGA RAM, i.e. device memory, allowing write combining to produce 64-byte store transactions. https://sites.utexas.edu/jdm4372/2013/05/29/notes-on-cached-access-to-memory-mapped-io-regions/)

How is DMA used in context with hdd?

See https://wiki.osdev.org/AHCI for how to tell the controller (with MMIO accesses) you want it to DMA data to or from physical RAM.

Upvotes: 4

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