Reputation: 22342
I've seen the following technique used to automatically compile all of the C (or C++, or I suppose whatever extension you wanted) files in a particular directory.
SOURCE_DIRS = .
SOURCES := $(subst ./,,$(wildcard $(SOURCE_DIRS:=/*.cpp)))
HEADERS := $(subst ./,,$(wildcard $(SOURCE_DIRS:=/*.h)))
OBJECTS := $(addprefix build/,$(SOURCES:.cpp=.o))
CXX = g++
CXXFLAGS = -Wall -pedantic -g
#LDFLAGS =
all: build/exe_name
build/exe_name: $(OBJECTS)
$(CXX) -o $@ $(OBJECTS) $(LDFLAGS)
build/%.o: %.cpp $(HEADERS) Makefile
mkdir -p $(dir $@)
$(CXX) -o $@ $(CXXFLAGS) -c $<
The only problem is that it builds all of the files in the same structure as is in the source directory. So if you had a sub folder with code in it, than the build would have a matching sub folder.
So, how can I modify this (or what else can be done), to get all of the outputted targets to be placed directly in the build/ directory, rather than in a hierarchy that matches the source directory?
I've thought about trying to strip any directories that may be presented in the '%' when it's used in the target, but I can't find any good commands to do that. Also, it seems a bit problematic to try to change the OBJECTS path when created, as I have no idea how the '%' variable reads it, other than that it is magically compiling everything in the OBJECTS list.
Thank you for any help you can give.
Upvotes: 2
Views: 295
Reputation: 18667
The easiest (although not strictly make-only) way would be to use automake
and not set the subdir-options
option.
Upvotes: 0
Reputation: 99172
In order,
SOURCES := whatever...
vpath %.cpp $(dir $(SOURCES))
SOURCES := $(notdir $(SOURCES))
Upvotes: 3