Reputation: 355
I was looking into Chiffre
as an option for fault injection in my design and noticed some when
statements with printf
in them.
when (enabled && RegNext(!enabled)) {
printf(s"""|[info] $name enabled
|[info] - seed: 0x%x
|[info] - difficulty: 0x%x
|""".stripMargin, seed, difficulty)
}
when (!enabled && RegNext(enabled)) {
printf(s"[info] $name disabled\n")
}
I found this a bit odd so started investigated. So far, I know chisel3 has a printf
function, and the documentation says it "prints a message in simulation." Does this apply to verilog simulations, scalaland simulations, or both? If I use chisel3's printf
does this result in $display
statements in the verilog?
Upvotes: 2
Views: 141
Reputation: 355
The (very exciting) answer to this is yes. While not $display
statements, the generated verilog includes $fwrite
.
Scastie example of $fwrite
here https://scastie.scala-lang.org/Hajn4b1sTDmcxk5sBHw7pQ
[at some point I'll learn the new firrtl annotation to disable rand]
Upvotes: 2