G Anson
G Anson

Reputation: 21

Connecting to the JTAG UART in a Microblaze application - redirecting stdio to the jtag_uart?

I have a design in Xilinx FPGA that is remote and I only have a JTAG connection. There is a feature in the Microblaze Debug Module IP that lets the user enable jtag uart. In the BSP there is a setting for which usart to use for stdin and stdout. When I open the drop down list there is only the "none" or "axi_uartlite_0" available. What I would really like to know is how can I change the STDIO to use the JTAG UART so that I can see what my app is printing. I see comments in other search results that say "just redirect stdio from the axi_uartlite to the jtag uart" but nowhere have I found exactly how to do that. That is exactly what I want to do - redirect STDIO from a physical uart to the jtag uart. If there is anyone who knows and is willing to pass along that information I would be extremely grateful and would give as many kudos as I possibly can. Thanks in advance for any and all assistance rendered - very thankful.

Upvotes: 0

Views: 2459

Answers (2)

Dave_98001
Dave_98001

Reputation: 1

I am pretty sure that you need to add an MDM with the "Enable JTAG UART" check box, re-synthesize, re-build the bitstream, export the bit file, etc. After this is done, Vivado will update the settings which are used by SDK to configure the libraries, compiler, etc. The most obvious of these is the file XPARAMETERS.H.

So, yeah, a complete rebuild is needed, IMHO.

This is part of XSCT (Xilinx Software Command-line Tool):

https://japan.xilinx.com/htmldocs/xilinx2019_1/SDK_Doc/xsct/streams/reference_streams_jtagterminal.html

https://japan.xilinx.com/htmldocs/xilinx2017_1/SDK_Doc/index.html?q=/htmldocs/xilinx2017_1/SDK_Doc/xsct/use_cases/xsdb_using_jtag_uart.html

Upvotes: 0

G Anson
G Anson

Reputation: 21

I have solved this issue by starting from scratch and recreating the entire design. It appeared that by just adding the "Enable JTAG UART" check box in the MicroBlaze Debug Module (MDM) and generating the bitstream and exporting the hardware was insufficient to add that functionality to the BSP.

Once I did the generate/export and created a completely new app based upon that BSP I was able to see prints on the jtagterminal.

So, I believe there is some weird behavior in the first process followed. More work to resolve should be done but for now I'm moving forward. I hope this somehow helps others with similar problems.

Upvotes: 1

Related Questions