Makefile : No rule to make target (automatic variables)

Question

I am having trouble with my makefile, i have been reading somme tutoriels on how to make a more re-usable makefile but i am facing this error, and i have been searching for a while now, especially on the GNU make manual and here.

Here is my makefile :

SRC_DIR=./src
BUILD_DIR=./build
OBJS= $(BUILD_DIR)/main.o $(BUILD_DIR)/hamming.o

$(BUILD_DIR)/%.o: $(SRC_DIR)/%.c $(SRC_DIR)/%.h
    $(CC) -c $< $(CFLAGS) -o $@

$(BUILD_DIR)/main: $(OBJS)
    $(CC) -o $@ $^ $(CFLAGS)

I am having the error :

make: No rule to make target build/main.o', needed bybuild/main'. Stop.

It seems to me that the objects in the variable OBJS are not associated with the %.o pattern rule, but i don't know why.

In my working directory there is : my makefile and the two directories 'src' and 'build'.

Thank you.

Answer 1

I'll go out on a limb and guess that there is no src/main.h. If that's the case, you could fix things this way:

$(BUILD_DIR)/hamming.o: $(BUILD_DIR)/%.o : $(SRC_DIR)/%.h

$(BUILD_DIR)/%.o: $(SRC_DIR)/%.c
    $(CC) -c $< $(CFLAGS) -o $@

EDIT:
Now I'm puzzled. Please try this (it is crude, but if it works we can refine it):

SRC_DIR=./src
BUILD_DIR=./build
OBJS= $(BUILD_DIR)/main.o $(BUILD_DIR)/hamming.o

$(BUILD_DIR)/%.o: $(SRC_DIR)/%.c $(SRC_DIR)/%.h
    $(CC) -c $< $(CFLAGS) -o $@

$(BUILD_DIR)/main.o: $(SRC_DIR)/main.c
    $(CC) -c $< $(CFLAGS) -o $@

$(BUILD_DIR)/main: $(OBJS)
    $(CC) -o $@ $^ $(CFLAGS)

Answer 2

Here is a little documentation I put together for NMake a while back I hope it helps. Are you sure there are only tabs before the commands. You can't have spaces that is the number one error I have seen in the past.