Reputation: 177
Using GNU Make of course.
I have the following setup:
Makefile
subdir1
--- Makefile
--- source1.c
--- binary1
subdir2
--- Makefile
--- source2.c
--- binary2
Both makefiles in the subdirs have a run target, which executes the binary generated by itself.
The root makefile contains the all
target, which runs make -C subir1 && make -C subdir2
:
SUBDIRS = subdir1 subdir2
all:
@for DIR in $(SUBDIRS); do \
$(MAKE) -C $$DIR; \
done
clean:
@for DIR in $(SUBDIRS); do \
$(MAKE) -C $$DIR clean; \
done
$(SUBDIRS):
$(MAKE) -C $@
The bottom bit lets me execute make all
for a single subdir.
I want a similar target for make run
, generated by $(SUBDIRS)
.
I tried
run-$(SUBDIRS):
make -C $(subst run-,,$@) run
but the target expands to run-subdir1 subdir2
, and doesn't add the prefix to the second item in $(SUBDIRS)
If i add a new var RUN_TARGETS = $(addprefix run-, $(SUBDIRS)
, it works, but make doesn't recognize the targets for utocompletion. Is there any option to let make know that is has to expand RUN_TARGETS or any other method to prefix a list of item?
The issue for me is my shell, zsh, and not make itself. Bash completion gets it right.
Upvotes: 0
Views: 850
Reputation: 81
To complement the solution by @MadScientist:
Use Substitution References to simplify the code (if you're familiar with this concept).
$(SUBDIRS:%=run-%): run-%:
$(MAKE) -C $* run
Upvotes: 0
Reputation: 100946
You can use a pattern rule:
run-%:
$(MAKE) -C $* run
or if you prefer to be more explicit, a static pattern rule:
$(addprefix run-,$(SUBDIRS)): run-%:
$(MAKE) -C $* run
Upvotes: 1