Reputation: 1
How do I count the number of times the watchdog timer has been reset? Can anyone help me in this.
Upvotes: 0
Views: 510
Reputation: 93476
TI don't make it easy to find the documentation! The MSP432FR401 datasheet has a broken link to the reference manual. I can only find copies at various non-TI sites such as this. YMMV.
Section 3.3.2 and 3.3.5 describe the hard and soft reset status registers respectively. The one you need depends on how you have configured the watchdog timer (section 4.11.3).
The reset sources are device specific and not explicitly stated in the general user manual. It refers you to the datasheet. Unfortunately as far as I can find, the promised information is not there either! I suggest that you experiment and read the register on start-up following a reset and determine which bit is unique to a watchdog reset rather than say a power-on reset. (To be honest however I'd also suggest not using a part so poorly documented and supported).
If you can determine which RSTCTL_HARDRESET_STAT
/RSTCTL_SOFTRESET_STAT
bit relates specifically to a watchdog reset, you can test it on start-up and increment your counter. Neither your board or MCU have any convenient non-volatile storage for such a counter. If you only need to count watchdog resets whilst continuously powered, you can keep the counter in a reserved location in SRAM (a specific address not initialised on start-up and not available to the linker to locate data objects), but if you want a "lifetime" count, then you may need to dedicate an entire 4K flash sector to the counter (and deal with the flash endurance issue - that probably warrants a new question if it is relevant).
Upvotes: 0
Reputation: 7057
Write code to detect that a watchdog reset has occurred. The microcontroller may have a register flag that indicates the reason for the previous reset (e.g., hard, soft, brown-out, watchdog, etc.). Look for this register flag in the reset or power control registers in your microcontroller's reference manual. Read this register flag during system initialization to detect that a watchdog reset occurred. Or alternately, enable the watchdog reset interrupt handler to detect that a watchdog reset is occurring.
When a watchdog reset is detected, increment a counter variable and save the counter value to nonvolatile memory. Read/restore the watchdog counter value from nonvolatile memory during system initialization or before incrementing the count. Saving the count value in nonvolatile memory allows the count value to be remembered through a power loss.
Upvotes: 1