CODEWITHSUNDEEP
bit-manipulationriscvbitwise-andrars-simulator
Lorenzo
Lorenzo

Reputation: 1

AND in RISC-V (RARS) doesn't give me "out of bound" error

I'm new to RISC-V and I was making some exercises, I have to take the bits in 3rd and 4th position in x5 register and substitute them to the bits in 7th and 8th position in x6 register. That's what I did (my Professor did it too but i tried to make it different):

.globl _start
.data 

 
.text

_start:

li x5,0x0
li x6,0X33333333333

#take the value from 3rd 4th
andi x7,x5,12

#shift them in 7th 8th
slli x7,x7,4

#set 0 bits in 7th 8th position of x6
andi x6, x6, 0xffffffffffffff3f

#I set the bits I want (in x7) inside x6 using OR
or x6,x6,x7

(I didn't know where to write the code so I just wrote it inside HTML section, hope it's fine)

My problem is: why the last andi works (the one with 0xffffff...)? Shouldn't it give me an "out of bound" error? The immediate field in "and" has only 12 bits.

Upvotes: 0

Views: 126

Answers (0)

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