CODEWITHSUNDEEP
pythonpython-3.xspiftdi
idan357
idan357

Reputation: 377

pyftdi with FT4232HL: missing last bit in every byte

The last bit of every byte is missing when reading data from SC18IS600.

Using pyftdi version 0.50.0 with FT4232HL FTDI chip reading registers from SC18IS600 (SPI-to-I²C chip), I'm missing the last bit when reading its internal registers and from reading data from slave I²C chips.

I am using SPI mode 3 and a 100 kHz clock.

My code:

from pyftdi.spi import SpiController

spi = SpiController(cs_count=5,)

# Configure the first interface (IF/2) of the FTDI device as a SPI master
spi.configure('ftdi://ftdi:ft4232h:/2')

# Get a port to a SPI slave w/ /CS on B*BUS and SPI mode 3 @ 100 kHz
slave = spi.get_port(cs=2, freq=100e3, mode=3)

rtrn = slave.exchange([0x21, 0x00, 0x00], 1)
print(rtrn.hex())

The rtrn value is 0x0E, but the written value is 0x0F (register control GPIO I verify is HIGH after write).

It was tested with an oscilloscope on the FTDI SPI lines, and I can verify the 0x0F:

Oscilloscope with SPI decode

Green: CS, Yellow: clock, Purple: MOSI, Orange: MISO

I contacted NXP support and from the image below, they say everything is good with the command and structure sent to the chip and the return values are good.

SC18IS600 datasheet

How can I solve this?

Upvotes: 0

Views: 577

Answers (1)

Sean Brown
Sean Brown

Reputation: 1

Check that the mode is really set to 3. You can confirm by checking the values of: slave._cpha and slave._cpol

I've found that get_port() doesn't actually set the mode and you need to explicitly change the mode with: slave.set_mode(mode = 3)

Upvotes: 0

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