CODEWITHSUNDEEP
vhdl
Henkka
Henkka

Reputation: 1663

VHDL: Problem with unexpected IF

Hello I am trying to learn VHDL in xilinx ISE enviroment and I can not get this code to work and i do not know why. I have tried single quotes using/not using ands, but nothing works. Could someone please help me?

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity teh_3 is
    Port ( thermo_input : in  STD_LOGIC_VECTOR(3 DOWNTO 0);
           too_hot : out  STD_LOGIC;
           too_cold : out  STD_LOGIC;
           just_right : out  STD_LOGIC);
end teh_3;

architecture Behavioral of teh_3 is

begin

IF thermo_input < "1000" THEN
  too_cold <='1' and
  too_hot <='0' and
  just_right <='0';
ELSIF thermo_input > "1011" THEN 
    too_hot <='1' and
    too_cold <='0' and
    just_right <='0';
ELSIF thermo_input > "0111" THEN 
  just_right <='1' and
  too_hot <='0' and
  too_cold <='0';
ELSE
  just_right <='0' and
  too_hot <='0' and
  too_cold <='0';
END IF;

end Behavioral;

ERROR:HDLParsers:164 - "/home/student/kokeilu/kokeil.vhd" Line 40. parse error, unexpected IF

Thanks!

Upvotes: 0

Views: 10350

Answers (3)

Hendrik
Hendrik

Reputation: 1247

You should also be careful with thermo_input > "0111"

Make sure you think twice about what "0111" represents. Is it a signed or unsigned 4 bit integer? I recommend to make this explicit. Library 'numeric_std' contains a lot of helpful methods.

Upvotes: 1

Martin Thompson
Martin Thompson

Reputation: 16792

Fundamentally, you can't use if outside of a process.

Also, don't use std_logic_arith, use numeric_std - http://parallelpoints.com/node/3

To fix, make a process, or use the proper combinatorial syntax as suggested by patrick.

The way you have it currently it will have to be a combinatorial process, so be careful to get all your inputs in the sensitivity list or use the new VHDL-2008 process(all) syntax. Depends on which version of ISE you are using as to whether that is supported.

Or make it a synchronous process - this is how most code for FPGAs is written.

Add a clk input to your entity and then put your if/elsif/else code inside a synchronous process:

process (clk)
begin
  if thermo_input < "1000" then
   .... etc
end process;

Finally, you don't use AND to make several things happen at once:

IF thermo_input < "1000" THEN
  too_cold <='1'; -- semicolons here, not ANDs!
  too_hot <='0';
  just_right <='0';

is the right way!

Upvotes: 5

patrick
patrick

Reputation: 1292

An if can only be used inside a process. You can use a WHEN instead or you have to create a process. I Should go for the when statement, which looks like this.

Example:

too_cold   <= '1' WHEN (thermo_input < "1000") ELSE '0';
too_hot    <= '1' WHEN (thermo_input > "1011") ELSE '0';
just_right <= '1' WHEN (thermo_input > "0111" AND thermo_input < "1011") ELSE '0';

I didn't test it, but this is to give you an idea.

Upvotes: 2

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