RK Eshat
RK Eshat

Reputation: 41

I am unable to figure out whether the Negative Flag or Overflow Flag will be set here

I am treating the data as signed numbers. My Professor taught me that BRLT conditional is fulfilled when Sign Flag is set to 1. I am not able to figure out how Sign Flag shows 1 in my calculation here using the code of AVR in Assembly Language.

My code:

LDI R16,0b11111111 (storing the number -128 into Register 16)

LDI R17,0b00000001 (storing +1 into Register 1 and negative of -1 in signed number is 10000001)

LOOP:
(defining Loop subroutine)

SUB R16,R17
(subtracting data in R16 from R17 and storing the result in R16 which should be -129 but that is out of range, as I am calculating using signed numbers the result should be 10000000)

CPI R16,0b00000000
(the result in R16 which is 10000000. When compared to 00000000, R16-0 is calculated which is 00000000. This will not set negative flag and also won't set the overflow flag. As Sign Flag is XOR of V and N, S should be 0. But that was not the case. Apparently S Flag is 1 here. I am not able to understand how.)

BRLT LOOP
(if Sign Flag is 1, BRLT is satisfied and we will go back up to where LOOP started)

Upvotes: 0

Views: 133

Answers (1)

Reinhard Männer
Reinhard Männer

Reputation: 15217

I don't know "the code of AVR in Assembly language". Thus I assume the following:

  • You use an 8-bit architecture.
  • If you have a 2-operand instruction, the left operand is the destination of the operation.
  • You use 2's complement integers.

Then:
LDI R16,0b11111111 loads -1 decimal into R16.
LDI R17,0b00000001 loads +1 decimal into R17.
SUB R16,R17 computes 0b11111111 - 0b00000001 = 0b11111110 and stores it in R16. 0b11111110 is -2 decimal.
CPI R16,0b00000000 computes 0b11111110 - 0b00000000 = 0b11111110, -2 decimal. Thus the negative flag is set.
Maybe this does not apply to your architecture, but only to my assumptions.

Upvotes: 1

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