Reputation: 165
I have this makefile.
CC = arm-none-eabi-gcc -c
LD = arm-none-eabi-gcc
OC = arm-none-eabi-objcopy
OS = arm-none-eabi-size
TARGET = cli_stm32f4
LIBNAME_OPENCM3 = opencm3_stm32f4
OPT = -Os
DEFS += -DSTM32F4
DIR_OPENCM3 = ./libopencm3
DIR_CLI = ./embedded-cli
DIR_OBJ = ./obj
DEBUG = -ggdb3
LDSCRIPT = stm32f4.ld
DIR_FLAGS = -I$(DIR_CLI)
ARCH_FLAGS = -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
LDFLAGS += --static -nostartfiles
LDFLAGS += -T$(LDSCRIPT)
LDFLAGS += $(ARCH_FLAGS) $(DEBUG)
LDFLAGS += -Wl,-Map=$(TARGET).map -Wl,--cref
LDFLAGS += -Wl,--gc-sections
ifeq ($(V),99)
LDFLAGS += -Wl,--print-gc-sections
endif
LDFLAGS += -u _printf_float
LDFLAGS += -L$(DIR_OPENCM3)/lib
LDLIBS += -l$(LIBNAME_OPENCM3)
LDLIBS += -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group
CFLAGS += $(OPT) $(DEBUG) $(ARCH_FLAGS)
CFLAGS += -Wextra -Wshadow -Wimplicit-function-declaration
CFLAGS += -Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes
CFLAGS += -fno-common -ffunction-sections -fdata-sections
CFLAGS += -std=c11 -MMD -MP
DEFS += -I$(DIR_OPENCM3)/include
PREPFLAGS = -MD -Wall -Wundef $(DEFS)
BINFLAGS = -O binary
OBJS = $(DIR_OBJ)/main.o \
$(DIR_OBJ)/cli.o
all : $(TARGET).bin
$(TARGET).bin : $(OBJS) $(LDSCRIPT)
$(LD) $(LDFLAGS) $(OBJS) $(LDLIBS) -o $(TARGET).elf
$(OC) $(TARGET).elf $(BINFLAGS) $@
$(DIR_OBJ)/%.o : %.c
mkdir -p $(DIR_OBJ)
$(CC) $(CFLAGS) $(DIR_FLAGS) $(PREPFLAGS) $< -o $@
clean :
rm -rf $(DIR_OBJ) *.bin *.elf *.map *.d
-include $(OBJS:.o=.d)
I thought that with this instruction, two object files would be created: main.o and cli.o.
OBJS = $(DIR_OBJ)/main.o \
$(DIR_OBJ)/cli.o
cli.c and main.c are in different folders. The former is inside a folder named embedded-cli within the main folder, and the latter is in the main folder with the makefile. I already added embedded-cli folder with this instruction.
DIR_FLAGS = -I$(DIR_CLI)
But I get this.
make: *** No rule to make target 'obj/cli.o', needed by 'cli_stm32f4.bin'. Stop.
Upvotes: 0
Views: 908
Reputation: 100781
A rule like:
$(DIR_OBJ)/%.o : %.c
means that if you have a file like ./obj/cli.o
can be built from a file named cli.c
. But, you don't have a file named cli.c
. You have a file named embedded-cli/cli.c
: these are not the same thing.
Adding some path to a variable like DIR_FLAGS
doesn't mean anything to make: it doesn't tell make how to find files.
You have two choices: you can either write a different pattern rule for each source directory:
$(DIR_OBJ)/%.o : %.c
...
$(DIR_OBJ)/%.o : embedded-cli/%.c
...
Or, you can set the VPATH
variable to a list of source directories that make should check:
VPATH = embedded-cli
Upvotes: 2