CODEWITHSUNDEEP
armqemucortex-m
cberk1
cberk1

Reputation: 45

Measuring Cycle Count on an505 M33 Qemu

I'm trying to emulate an Arm cortex M33 using QEMU, using the an505 model. I've used this git repo as a starting point.

I've successfully built the project and even managed to debug into it however now I want to measure the cpu cycles consumed - without any luck.

Firstly, I tried to access the DWT registers like so:

#define  ARM_CM_DEMCR      (*(uint32_t *)0xE000EDFC)
#define  ARM_CM_DWT_CTRL   (*(uint32_t *)0xE0001000)
#define  ARM_CM_DWT_CYCCNT (*(uint32_t *)0xE0001004)

main()
{
        if (ARM_CM_DWT_CTRL != 0) {        /* See if DWT is available */
            ARM_CM_DEMCR      |= 1 << 24;  /* Set bit 24 */
            ARM_CM_DWT_CYCCNT  = 0;
            ARM_CM_DWT_CTRL   |= 1 << 0;   /* Set bit 24 */
        }

}

however ARM_CM_DWT_CTRL appears to be 0, indicating that the DWT register is not configured. This code is working on the actual M33 hardware I have. I've checked the an505 doc and I can't see anything wrt DWT. Is this therefore a lost cause? Is it not likely that the FPGA would implement the DWT register?

I moved on to using the SysTick API as described here however when I access SysTick->VAL it equals 0.

I've also tried to read from STCVR = 0xE000E018 as per the instructions here but also, this returns 0.

Am I missing something fundamental here?

Upvotes: 0

Views: 602

Answers (1)

Peter Maydell
Peter Maydell

Reputation: 11483

QEMU is not a cycle accurate model. We also don't implement the DWT unit.

The SysTick timer in QEMU's implementation will essentially measure real-world time. This is not a very good guide to what real-hardware performance will look like.

If you want to measure the performance of code then your best bet is usually to do it on the real hardware that you care about. Getting performance information out of an emulation is tricky at best. This old answer to another question has a runthrough of some of the difficulties.

Upvotes: 3

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