Russell
Russell

Reputation: 3455

Are unsigned vs. signed multiply performed differently?

I'm trying to multiply two numbers together. One is 3'b111 and the other is 2'b11 (using Verilog syntax). If we assume those are unsigned, the result is:

  111
x  11
-----
10101

This makes sense, since 3'b111 is 7, and 2'b11 is 3, and 7 * 3 = 21, which is 5'b10101. I'm good up to this point. But let's assume now that we're multiplying two signed numbers together. Now we have 3'b111 which is -1, and 2'b11 which is -1. We produce a 5-bit result, which is 5'b10101, the same result as the unsigned case. But here, we're getting -11 for our answer, rather than 1.

The code is producing the correct result, namely 5'b00001, but when you do it by hand I'm unable to get this. Why is this? Is the signed case treated differently than the unsigned case?

Upvotes: 0

Views: 754

Answers (1)

Matthias Schweikart
Matthias Schweikart

Reputation: 707

When implementing multiplication, the question always is: How many bits must the adders have? How many additions do I have to perform? The answers are: The adders must have the bit width of the product. The number of additions is identical to the number of bits the original multiplier has (this is even correct, if the operands are in 2's complement). So in terms of "how many adder bits and "how many additions" signed and unsigned multiplication are handled identical. But of course, as 2's complement represents negative numbers by "too big" numbers, the algorithms of "how to add" are different.

Upvotes: 1

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