CODEWITHSUNDEEP
riscvspike
J.Lu
J.Lu

Reputation: 11

illegal instruction when running fp16 vector add in spike simulator

I'm new to RISC-V and Spike.I've been trying to run float16 vector addition demo on the Spike simulator recently, but when I try to run the code, I get an error message saying "An illegal instruction was executed!". I'm not sure how to solve this problem and would appreciate some help.

Here is my code:

#include <stdio.h>
typedef __fp16 float16_t;

int test_vector_add_fp16() {
    // float16 vector add test demo
    float16_t A[128];
    float16_t B[128];
    float16_t C[128];

    for (int i = 0; i < 128; i++) {
        A[i] = (float16_t)(0.5 * i);
        B[i] = (float16_t)(0.5 * i);
    }

    int len = 8;

    __asm__ __volatile__(
        "li            a0, 128                 \n\t"
        "li            a1, 0                   \n\t"
        "li            a2, 1                   \n\t"
        "mv            t1, %[PA]               \n\t"
        "mv            t2, %[PB]               \n\t"
        "mv            t3, %[PC]               \n\t"
        "mv            t4, %[LEN]              \n\t"
        "_loop_test_1:                         \n\t"
        "vsetvli       t0, a0, e16, m1         \n\t"
        "sub           a0, a0, t0              \n\t"
        "vle16.v       v0, (t1)                \n\t"
        "vle16.v       v1, (t2)                \n\t"
        "vfadd.vv      v2, v0, v1              \n\t"
        "vse16.v       v2, (t3)                \n\t"
        "bnez          a0, _loop_test_1        \n\t"
        :
        : [LEN] "r"(len), [PA] "r"(A), [PB] "r"(B), [PC] "r"(C), [PK] "r"(K)
        : "a0", "a1", "a2", "t0", "t1", "t2", "t3", "t4", "v0", "v1", "v2", "v3");
    printf("The result is %.2f\n", C[0]);
    return 0;
}

Here is my compilation command, and the compilation works fine:

riscv64-unknown-elf-gcc test_fp16.c -o test_fp16 -march=rv64gcv_zfh -mabi=lp64

When I executed the elf with spike, I used:

spike pk test_fp16

I found:

bbl loader z 0000000000000000 ra 0000000000010276 sp 0000003ffffff810 gp 000000000001f1d0 tp 0000000000000000 t0 0000000000000010 t1 0000003ffffffa20 t2 0000003ffffff910 s0 0000003ffffffb40 s1 0000000000000000 a0 0000000000000070 a1 0000000000000000 a2 0000000000000001 a3 0000000000000010 a4 0000003ffffff910 a5 0000003ffffffa20 a6 000000000000001f a7 0000000000000000 s2 0000000000000000 s3 0000000000000000 s4 0000000000000000 s5 0000000000000000 s6 0000000000000000 s7 0000000000000000 s8 0000000000000000 s9 0000000000000000 sA 0000000000000000 sB 0000000000000000 t3 0000003ffffffa20 t4 0000000000000000 t5 0000000000000000 t6 0000000000000000 pc 0000000000010234 va/inst 000000000e009157 sr 8000000200006620 An illegal instruction was executed!

I used sifive gcc

riscv64-unknown-elf-gcc (SiFive GCC-Metal 10.2.0-2020.12.8) 10.2.0 Copyright (C) 2020 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

The configuration to compile Spike is ../configure --prefix=$RISCV --with-isa=RV64IMAFDCVZFH --with-varch=vlen:256,elen:64

I am pretty sure the illegal instruction is from ""vfadd.vv v2, v0, v1", because when I comment out this instruction, spike works fine.

Can you tell me if there is a problem with the configuration of Spike? Thanks a lot!

Upvotes: 1

Views: 296

Answers (1)

J.Lu
J.Lu

Reputation: 11

I later solved the problem, which was because Spike requires the definition of the zvfh extension in the ISA, but I only defined the zfh extension.

while build spike to support fp16 vector instruction, we need:

../configure --prefix=$RISCV --with-isa=RV64IMAFDCV_zvfh

Upvotes: 0

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