Jokubas11
Reputation: 160
zephyr RTOS (STM32) custom node not imported: undefined reference to `__device_dts_ord_xx`
This is definitely doable, because I have been able to do it on another PC, but on this PC that I am working, I have ran into issue, it seems that I have forgotten something, but I cannot be sure why.
Once I run zephyr build after writing the following code:
const struct device *dev = DEVICE_DT_GET(DT_NODELABEL(mygpio));
if (!device_is_ready(dev)) {
printk("unready");
}
I run into following:
undefined reference to `__device_dts_ord_17'
I have been following this guide on how to sort the issue but to no avail: https://docs.zephyrproject.org/latest/build/dts/troubleshooting.html
The following file is nucleo_f334r8.overlay file
/ {
compatible = "st,stm32f334r8-nucleo";
mygpio: mygpio {
compatible = "zephyr,mygpio";
status = "okay";
gpios = <&gpioa 12 (GPIO_ACTIVE_HIGH)>,
<&gpiob 5 (GPIO_ACTIVE_HIGH)>,
<&gpiob 10 (GPIO_ACTIVE_HIGH)>,
<&gpiob 6 (GPIO_ACTIVE_HIGH)>;
};
};
&usart2 {
status = "okay";
};
&timers2 {
status = "okay";
st,prescaler = <4095>;
counter: counter {
compatible = "st,stm32-counter";
status = "okay";
};
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
};
The following is my prj.conf file
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_COUNTER=y
CONFIG_COUNTER_TIMER_STM32=y
CONFIG_RING_BUFFER=y
CONFIG_GPIO=y
I have defined a binding in my dts/bindings
description: |
mygpio
compatible: "zephyr,mygpio"
include: base.yaml
properties:
gpios:
type: phandle-array
required: true
description: List of gpios
inside of build folder, inside of zephyr.dts, my node is successfully generated:
mygpio: mygpio {
compatible = "zephyr,mygpio";
status = "okay";
gpios = < &gpioa 0xc 0x0 >, < &gpiob 0x5 0x0 >, < &gpiob 0xa 0x0 >, < &gpiob 0x6 0x0 >;
};
devicetree_generated.h contains my node
...
* 16 /soc/pin-controller@48000000/gpio@48000400
* 17 /mygpio
* 18 /st-morpho-header
...
devicetree_generated.h also contains various macroses that assign pins and etc
/* Node's full path: */
#define DT_N_S_mygpio_PATH "/mygpio"
/* Node's name with unit-address: */
#define DT_N_S_mygpio_FULL_NAME "mygpio"
/* Node parent (/) identifier: */
#define DT_N_S_mygpio_PARENT DT_N
/* Node's index in its parent's list of children: */
#define DT_N_S_mygpio_CHILD_IDX 15
/* Helper macros for child nodes of this node. */
#define DT_N_S_mygpio_FOREACH_CHILD(fn)
#define DT_N_S_mygpio_FOREACH_CHILD_SEP(fn, sep)
#define DT_N_S_mygpio_FOREACH_CHILD_VARGS(fn, ...)
#define DT_N_S_mygpio_FOREACH_CHILD_SEP_VARGS(fn, sep, ...)
#define DT_N_S_mygpio_FOREACH_CHILD_STATUS_OKAY(fn)
#define DT_N_S_mygpio_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep)
#define DT_N_S_mygpio_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...)
#define DT_N_S_mygpio_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...)
/* Node's dependency ordinal: */
#define DT_N_S_mygpio_ORD 17
#define DT_N_S_mygpio_ORD_STR_SORTABLE 00017
/* Ordinals for what this node depends on directly: */
#define DT_N_S_mygpio_REQUIRES_ORDS \
0, /* / */ \
15, /* /soc/pin-controller@48000000/gpio@48000000 */ \
16, /* /soc/pin-controller@48000000/gpio@48000400 */
/* Ordinals for what depends directly on this node: */
#define DT_N_S_mygpio_SUPPORTS_ORDS /* nothing */
/* Existence and alternate IDs: */
#define DT_N_S_mygpio_EXISTS 1
#define DT_N_INST_0_zephyr_mygpio DT_N_S_mygpio
#define DT_N_NODELABEL_mygpio DT_N_S_mygpio
/* Macros for properties that are special in the specification: */
#define DT_N_S_mygpio_REG_NUM 0
#define DT_N_S_mygpio_RANGES_NUM 0
#define DT_N_S_mygpio_FOREACH_RANGE(fn)
#define DT_N_S_mygpio_IRQ_NUM 0
#define DT_N_S_mygpio_COMPAT_MATCHES_zephyr_mygpio 1
#define DT_N_S_mygpio_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_mygpio_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding"
#define DT_N_S_mygpio_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_mygpio_COMPAT_MODEL_IDX_0 "mygpio"
#define DT_N_S_mygpio_STATUS_okay 1
/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_mygpio_PINCTRL_NUM 0
/* Generic property macros: */
#define DT_N_S_mygpio_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000000
#define DT_N_S_mygpio_P_gpios_IDX_0_VAL_pin 12
#define DT_N_S_mygpio_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_0_VAL_flags 0
#define DT_N_S_mygpio_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_1_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_1_PH DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400
#define DT_N_S_mygpio_P_gpios_IDX_1_VAL_pin 5
#define DT_N_S_mygpio_P_gpios_IDX_1_VAL_pin_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_1_VAL_flags 0
#define DT_N_S_mygpio_P_gpios_IDX_1_VAL_flags_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_2_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_2_PH DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400
#define DT_N_S_mygpio_P_gpios_IDX_2_VAL_pin 10
#define DT_N_S_mygpio_P_gpios_IDX_2_VAL_pin_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_2_VAL_flags 0
#define DT_N_S_mygpio_P_gpios_IDX_2_VAL_flags_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_3_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_3_PH DT_N_S_soc_S_pin_controller_48000000_S_gpio_48000400
#define DT_N_S_mygpio_P_gpios_IDX_3_VAL_pin 6
#define DT_N_S_mygpio_P_gpios_IDX_3_VAL_pin_EXISTS 1
#define DT_N_S_mygpio_P_gpios_IDX_3_VAL_flags 0
#define DT_N_S_mygpio_P_gpios_IDX_3_VAL_flags_EXISTS 1
#define DT_N_S_mygpio_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mygpio, gpios, 0) \
fn(DT_N_S_mygpio, gpios, 1) \
fn(DT_N_S_mygpio, gpios, 2) \
fn(DT_N_S_mygpio, gpios, 3)
#define DT_N_S_mygpio_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mygpio, gpios, 0) DT_DEBRACKET_INTERNAL sep \
fn(DT_N_S_mygpio, gpios, 1) DT_DEBRACKET_INTERNAL sep \
fn(DT_N_S_mygpio, gpios, 2) DT_DEBRACKET_INTERNAL sep \
fn(DT_N_S_mygpio, gpios, 3)
#define DT_N_S_mygpio_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mygpio, gpios, 0, __VA_ARGS__) \
fn(DT_N_S_mygpio, gpios, 1, __VA_ARGS__) \
fn(DT_N_S_mygpio, gpios, 2, __VA_ARGS__) \
fn(DT_N_S_mygpio, gpios, 3, __VA_ARGS__)
#define DT_N_S_mygpio_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mygpio, gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
fn(DT_N_S_mygpio, gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
fn(DT_N_S_mygpio, gpios, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
fn(DT_N_S_mygpio, gpios, 3, __VA_ARGS__)
#define DT_N_S_mygpio_P_gpios_LEN 4
#define DT_N_S_mygpio_P_gpios_EXISTS 1
#define DT_N_S_mygpio_P_status "okay"
#define DT_N_S_mygpio_P_status_STRING_UNQUOTED okay
#define DT_N_S_mygpio_P_status_STRING_TOKEN okay
#define DT_N_S_mygpio_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_mygpio_P_status_IDX_0 "okay"
#define DT_N_S_mygpio_P_status_IDX_0_EXISTS 1
#define DT_N_S_mygpio_P_status_ENUM_IDX 1
#define DT_N_S_mygpio_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_mygpio_P_status_ENUM_TOKEN okay
#define DT_N_S_mygpio_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_mygpio_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mygpio, status, 0)
#define DT_N_S_mygpio_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mygpio, status, 0)
#define DT_N_S_mygpio_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mygpio, status, 0, __VA_ARGS__)
#define DT_N_S_mygpio_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mygpio, status, 0, __VA_ARGS__)
#define DT_N_S_mygpio_P_status_LEN 1
#define DT_N_S_mygpio_P_status_EXISTS 1
#define DT_N_S_mygpio_P_compatible {"zephyr,mygpio"}
#define DT_N_S_mygpio_P_compatible_IDX_0 "zephyr,mygpio"
#define DT_N_S_mygpio_P_compatible_IDX_0_STRING_UNQUOTED zephyr,mygpio
#define DT_N_S_mygpio_P_compatible_IDX_0_STRING_TOKEN zephyr_mygpio
#define DT_N_S_mygpio_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MYGPIO
#define DT_N_S_mygpio_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_mygpio_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mygpio, compatible, 0)
#define DT_N_S_mygpio_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mygpio, compatible, 0)
#define DT_N_S_mygpio_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mygpio, compatible, 0, __VA_ARGS__)
#define DT_N_S_mygpio_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mygpio, compatible, 0, __VA_ARGS__)
#define DT_N_S_mygpio_P_compatible_LEN 1
#define DT_N_S_mygpio_P_compatible_EXISTS 1
#define DT_N_S_mygpio_P_wakeup_source 0
#define DT_N_S_mygpio_P_wakeup_source_EXISTS 1
#define DT_N_S_mygpio_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_mygpio_P_zephyr_pm_device_runtime_auto_EXISTS 1
Then I have checked zephyr.map file and it does not have any references to __device_dts_ord_17. So there must be some sort of issue, but I am unable to find it.
All of the default peripherals are working, and for example, using gpioa node works fine
Upvotes: 0
Views: 912
Answers (1)
Dhruv Kakadiya
Reputation: 45
Since you're facing an issue during final linking stage only (and rest of device tree settings look good) so my suspect would be towards STM32_GPIO module getting built. So can you check if you have following settings enabled in zephyr .config file under build folder? If they're not enabled then need to enable those in your board configuration file.
CONFIG_STM32_GPIO=y
CONFIG_DT_HAS_ST_STM32_GPIO_ENABLED=y
Upvotes: 0
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