CODEWITHSUNDEEP
assemblyrtosthreadxazure-rtoscortex-r
Rolland Ayonta Lontsi
Rolland Ayonta Lontsi

Reputation: 1

how to port the threadX RTOS on the cortex R5?

I tried to port Threadx RTOS to the cortex-R5 of the zynq UScale+.

Image showing the inclusion of the header file path in the application tree structure in Vitis IDE: enter image description here

But when I compile I get one of the errors from the assembler code files

undefined reference to `__tx_fiq_processing_return'

occurs in the tx_thread_fiq_context_save.S files


#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
@
@    /* Call the ISR enter function to indicate an ISR is executing.  */
@
    PUSH    {lr}                                @ Save ISR lr
    BL      _tx_execution_isr_enter             @ Call the ISR enter function
    POP     {lr}                                @ Recover ISR lr
#endif

    B       __tx_fiq_processing_return          @ Continue FIQ processing 
@
__tx_thread_fiq_not_nested_save:
@    }  
@

And

undefined reference to `_sp'

occurs in the tx_initialize_low_level.S files.

    .global _tx_initialize_low_level
    .type   _tx_initialize_low_level,function
_tx_initialize_low_level:
@
@    /* We must be in SVC mode at this point!  */
@
@    /* Setup various stack pointers.  */
@
    LDR     r1, =_sp                            @ Get pointer to stack area

but I can't find the file where its symbols were defined, unless I'm installing it incorrectly. please, i'd like to have proposals for a solution to port Threadx to the cortex-R5.

Upvotes: 0

Views: 285

Answers (1)

SUN
SUN

Reputation: 21

By this time you would have resolved the issue, adding comments as it may be helpful for others.

_sp is defined in https://github.com/eclipse-threadx/threadx/blob/master/ports/cortex_r5/gnu/example_build/sample_threadx.ld

lscript.ld of vitis need to be updated from sample_threadx.ld to resolve the issue . Other way is create new varaible _sp in lscript.ld

Upvotes: 0

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