Paul Sohn
Paul Sohn

Reputation: 21

Enabled MSI in qemu, but interrupt handler not invoking

I'm trying to build my own OS following a certain tutorial book.

(For the reference, it is a Japanese book called "ゼロからのOS自作入門".
Its source code is available here but I'm using Rust instead of C++ so some details might be different.)

I first implemented an xHCI driver for USB mouse and keyboard devices, and the main routine enters an infinity loop to examine(poll) the event ring front and capture device event TRBs.

The next task is to enable MSI interrupts in PCI interface so that the main loop no more polls the event ring directly. To emulate this in qemu, I used -device nec-usb-xhci option (since -device qemu-xhci only supports MSI-X, not MSI). I carefully followed the book's instructions - wrote approprate data into PCI config space, added an interrupt handler which processes queued events, loaded IDT, but the interrupt handler won't execute.

What could be possible difference and how can I activate MSI interrupt?


Below are my debug attempts:

I checked -trace "pci_cfg_write" options, and my writes are

pci_cfg_write nec-usb-xhci 04:0 @0x70 <- 0x890005
pci_cfg_write nec-usb-xhci 04:0 @0x74 <- 0xfee00000
pci_cfg_write nec-usb-xhci 04:0 @0x78 <- 0x0
pci_cfg_write nec-usb-xhci 04:0 @0x7c <- 0xc040

(0x40 is the xHCI interrupt vector I chose, and it accepts only one interrupt at a time.) which are same to the C++ implementation given in the book. The book implementation successfully enables MSI but mine doesn't.

I also tried inserting int 0x40 in the main loop to manually generate the desired (but not generating) interrupt, and the mouse moves normally as before. This means I have set IDT correctly, events are generating and the interrupt handler does its job only given that the 0x40 interrupt has generated.

Upvotes: 1

Views: 210

Answers (1)

Ian Seyler
Ian Seyler

Reputation: 1

The issue may be the 0xC0XX value you used. I used 0x40XX as I wanted Trigger Mode (15) = 0 for Edge, Level (14) = 1 for Low

Upvotes: 0

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