iMX6 IPU Screen Buffer Refresh

Question

I'm hoping there are still some "old timers" around that still know the internals of the iMX6Q IPU. I'm trying to use the IPU double buffer mechanism to perform double-buffering so I can draw into one buffer while displaying the other. Currently this works fine IF the drawing takes less than 1/60 sec (16.7 ms - time between two VS pulses). The IPU has registers CUR_BUF_RDY for each buffer to show when the buffer is ready to be displayed, and CUR_BUF to show which buffer is actually being displayed. To get the buffers to swap at VS rate both buffer 0 and buffer 1 bits have to be set ready. One would ASSUME that if more drawing time was necessary, just don't set the bits. Tried setting the bits every other frame, but if a frame is missed, double buffering will not start again by setting both ready bits. The CUF_BUF register is RO so I can't do anything that way.

My drawing time is ~23 ms, so every other VS pulse would be great. The reference manual says it can be done, but doesn't say how to do it. Anyone know how?

Tried playing with the CUR_BUF_RDY bits but I think that's a dead end.