Error: [riscv.cpu] Target riscv.cpu: Failed to write memory (addr=0x0)

Question

I encountered some problems when using ibex, the core I use is ibex, the DM I use is the repository that ibex supports, when I download the soc to the FPGA

my openocd configuration file is like this：

adapter driver ftdi
adapter speed 1000

# ftdi device_desc "JTAG Debugger"
ftdi vid_pid 0x0403 0x6010
ftdi layout_init 0x0008 0x001b

# adapter driver ftdi
transport select jtag

# Configure JTAG chain and the target processor
set _CHIPNAME riscv

# Configure JTAG expected ID
set _EXPECTED_ID 0x11001cdf
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_EXPECTED_ID -ignore-version
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME -work-area-phys 0x00100000 -work-area-size 0x20000

riscv set_mem_access sysbus
riscv set_enable_virt2phys off

reset_config none

init
halt

the address mapping of ibex external devices is like this

  localparam logic [31:0] MEM_SIZE      = 128 * 1024; // 128 KiB
  localparam logic [31:0] MEM_START     = 32'h00100000;
  localparam logic [31:0] MEM_MASK      = ~(MEM_SIZE-1);
`ifdef VERILATOR
  parameter logic [31:0] SIM_CTRL_SIZE  =  1 * 1024; //  1 KiB
  parameter logic [31:0] SIM_CTRL_START = 32'h20000;
  parameter logic [31:0] SIM_CTRL_MASK  = ~(SIM_CTRL_SIZE-1);
`endif
  parameter logic [31:0] TIMER_CTRL_SIZE = 1 * 1024; // 1KiB
  parameter logic [31:0] TIMER_CTRL_START = 32'h30000;
  parameter logic [31:0] TIMER_CTRL_MASK = ~(TIMER_CTRL_SIZE-1);

  localparam logic [31:0] DEBUG_SIZE    = 64 * 1024; // 64 KiB
  localparam logic [31:0] DEBUG_START   = 32'h1a110000;
  localparam logic [31:0] DEBUG_MASK    = ~(DEBUG_SIZE-1);

  localparam logic [31:0] UART_SIZE     =  4 * 1024; //  4 KiB
  localparam logic [31:0] UART_START    = 32'h80001000;
  localparam logic [31:0] UART_MASK     = ~(UART_SIZE-1);

  localparam logic [31:0] GPIO_SIZE     =  4 * 1024; //  4 KiB
  localparam logic [31:0] GPIO_START    = 32'h80000000;
  localparam logic [31:0] GPIO_MASK     = ~(GPIO_SIZE-1);

, run openocd and report the error message as follows, showing that the failure timeout when the write address is 0, but I don't have a device with a 0 base address,

Open On-Chip Debugger 0.12.0+dev-03771-gac120651c (2024-05-20-10:30)
Licensed under GNU GPL v2
For bug reports, read
    http://openocd.org/doc/doxygen/bugs.html
Info : clock speed 1000 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x11001cdf (mfg: 0x66f (lowRISC), part: 0x1001, ver: 0x1)
Info : [riscv.cpu] datacount=2 progbufsize=8
Info : [riscv.cpu] Examined RISC-V core
Info : [riscv.cpu]  XLEN=32, misa=0x40101104
[riscv.cpu] Target successfully examined.
Info : [riscv.cpu] Examination succeed
Info : starting gdb server for riscv.cpu on 3333
Info : Listening on port 3333 for gdb connections
riscv.cpu halted due to undefined.
Error: [riscv.cpu] Timed out after 2s waiting for sbbusy to go low (sbcs=0x20640407). Increase the timeout with riscv set_command_timeout_sec.
Warn : [riscv.cpu] Failed to write memory via system bus.
Error: [riscv.cpu] Target riscv.cpu: Failed to write memory (addr=0x0)
Error: [riscv.cpu]   progbuf=disabled, sysbus=failed, abstract=disabled

so I added parameters -work-area-phys 0x00100000 -work-area-size 0x20000 to qualify the address of the ram but that doesn't seem to work, can someone help me with this?

How can I solve this problem？ How should I restrict openocd from accessing the address of memory