Reputation: 11
I'm stuck with establishing communication between LPC43xx MCU and ESP32. I have wiring checked (RX to TX and vice versa) ESP32 to ESP32 and everything is OK, but with LPC I feel that missing some small fraction of configuration.
Here is my LPC code utilizing libopencm3. It uses pins 7_1 and 7_2 as that correspond to U2_TXD and U2_RXD as function 6 referring to UM10503 datasheet. All the rest is working, I'm modifying existing firmware, so PLL1 is at 204MHz, but UART is nowhere else initialized except my code. Baud rate is precisely matching on both sides as calculated based on LPC MCU reference formula from USART chapter, not rounded or else - exactly 3MHz. GPIO direction setting is correctly associating GPIO 3,9 with pin 7_1 and 3,10 with pin 7_2. Don't blame for while-loop, it's a simple test code, further will be moved to SCT implementation.
I'm not getting an error, uart_rx_data_ready is constantly returning UART_RX_NO_DATA. BUT ! When I interrupt the line by taking off TX or RX line, my ESP32 code reacts, but LPC code is not affected anyhow (I had separate else-statement with led-turning). SO my idea is that UART is not working at all, missing some extra configuration.
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/uart.h>
#include "external_bus.h"
static struct gpio_t u2_tx = GPIO(3, 9);
static struct gpio_t u2_rx = GPIO(3, 10);
void external_bus_start()
{
gpio_output(&u2_tx);
gpio_input(&u2_rx);
SCU_SFSP7_1 = SCU_UART_RX_TX
| SCU_CONF_FUNCTION6;
SCU_SFSP7_2 = SCU_UART_RX_TX
| SCU_CONF_FUNCTION6;
uart_init(UART2_NUM, UART_DATABIT_8, UART_STOPBIT_1, UART_PARITY_NONE, 3, 5, 12);
}
void external_test()
{
while(true)
{
uart_rx_data_ready_t status = uart_rx_data_ready(UART2_NUM);
if(status == UART_RX_NO_DATA || status == UART_RX_DATA_ERROR)
{
continue;
};
uint8_t result = uart_read(UART2_NUM);
if(result == 0xAA)
{
uart_write(UART2_NUM, 0xBB);
}
}
}
And here is my ESP32 code just to clarify.
#include <stdio.h>
#include "driver/uart.h"
#include "driver/gpio.h"
#include "esp_log.h"
#define UART_PORT_NUM UART_NUM_2
#define RX_PIN 16
#define TX_PIN 17
#define BUF_SIZE 1024
#define BAUD_RATE 3000000
static const char *TAG = "UART_EXAMPLE";
void app_main(void)
{
uart_config_t uart_config = {
.baud_rate = BAUD_RATE,
.data_bits = UART_DATA_8_BITS,
.parity = UART_PARITY_DISABLE,
.stop_bits = UART_STOP_BITS_1,
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
.source_clk = UART_SCLK_APB,
};
ESP_ERROR_CHECK(uart_driver_install(UART_PORT_NUM, BUF_SIZE * 2, 0, 0, NULL, 0));
ESP_ERROR_CHECK(uart_param_config(UART_PORT_NUM, &uart_config));
ESP_ERROR_CHECK(uart_set_pin(UART_PORT_NUM, TX_PIN, RX_PIN, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
ESP_LOGI(TAG, "ESP32 UART2 Communication Ready");
uint8_t data_to_send = 0xAA;
uint8_t data_buffer[BUF_SIZE];
int length = 0;
while (1) {
if (uart_write_bytes(UART_PORT_NUM, &data_to_send, 1) > 0) {
ESP_LOGI(TAG, "Data sent: 0x%02X", data_to_send);
}
vTaskDelay(pdMS_TO_TICKS(10));
length = uart_read_bytes(UART_PORT_NUM, data_buffer, BUF_SIZE - 1, pdMS_TO_TICKS(100));
if (length > 0) {
ESP_LOGI(TAG, "Received: ");
for (int i = 0; i < length; i++) {
printf("0x%02X ", data_buffer[i]);
}
printf("\n");
} else {
ESP_LOGI(TAG, "No response received");
}
vTaskDelay(pdMS_TO_TICKS(1000));
}
}
Also here is uart.c code
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Benjamin Vernoux <[email protected]>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/lpc43xx/uart.h>
#include <libopencm3/lpc43xx/cgu.h>
#define UART_SRC_32K 0x00
#define UART_SRC_IRC 0x01
#define UART_SRC_ENET_RX 0x02
#define UART_SRC_ENET_TX 0x03
#define UART_SRC_GP_CLKIN 0x04
#define UART_SRC_XTAL 0x06
#define UART_SRC_PLL0USB 0x07
#define UART_SRC_PLL0AUDIO 0x08
#define UART_SRC_PLL1 0x09
#define UART_SRC_IDIVA 0x0C
#define UART_SRC_IDIVB 0x0D
#define UART_SRC_IDIVC 0x0E
#define UART_SRC_IDIVD 0x0F
#define UART_SRC_IDIVE 0x10
#define UART_CGU_AUTOBLOCK_CLOCK_BIT 11
/* clock source selection (5 bits) */
#define UART_CGU_BASE_CLK_SEL_SHIFT 24
uint32_t dummy_read;
/*
* UART Init function
*/
void uart_init(uart_num_t uart_num, uart_databit_t data_nb_bits,
uart_stopbit_t data_nb_stop, uart_parity_t data_parity,
uint16_t uart_divisor, uint8_t uart_divaddval, uint8_t uart_mulval)
{
uint32_t lcr_config;
uint32_t uart_port;
uart_port = uart_num;
switch (uart_num) {
case UART0_NUM:
/* use PLL1 as clock source for UART0 */
CGU_BASE_UART0_CLK = (1<<UART_CGU_AUTOBLOCK_CLOCK_BIT) |
(CGU_SRC_PLL1<<UART_CGU_BASE_CLK_SEL_SHIFT);
break;
case UART1_NUM:
/* use PLL1 as clock source for UART1 */
CGU_BASE_UART1_CLK = (1<<UART_CGU_AUTOBLOCK_CLOCK_BIT) |
(CGU_SRC_PLL1<<UART_CGU_BASE_CLK_SEL_SHIFT);
break;
case UART2_NUM:
/* use PLL1 as clock source for UART2 */
CGU_BASE_UART2_CLK = (1<<UART_CGU_AUTOBLOCK_CLOCK_BIT) |
(CGU_SRC_PLL1<<UART_CGU_BASE_CLK_SEL_SHIFT);
break;
case UART3_NUM:
/* use PLL1 as clock source for UART3 */
CGU_BASE_UART3_CLK = (1<<UART_CGU_AUTOBLOCK_CLOCK_BIT) |
(CGU_SRC_PLL1<<UART_CGU_BASE_CLK_SEL_SHIFT);
break;
default:
return; /* error */
}
/* FIFOs RX/TX Enabled and Reset RX/TX FIFO (DMA Mode is also cleared)*/
UART_FCR(uart_port) = (UART_FCR_FIFO_EN | UART_FCR_RX_RS |
UART_FCR_TX_RS);
/* Disable FIFO */
UART_FCR(uart_port) = 0;
/* Dummy read (to clear existing data) */
while (UART_LSR(uart_port) & UART_LSR_RDR) {
dummy_read = UART_RBR(uart_port);
}
/* Wait end of TX & disable TX */
UART_TER(uart_port) = UART_TER_TXEN;
/* Wait for current transmit complete */
while (!(UART_LSR(uart_port) & UART_LSR_THRE));
/* Disable Tx */
UART_TER(uart_port) = 0;
/* Disable interrupt */
UART_IER(uart_port) = 0;
/* Set LCR to default state */
UART_LCR(uart_port) = 0;
/* Set ACR to default state */
UART_ACR(uart_port) = 0;
/* Dummy Read to Clear Status */
dummy_read = UART_LSR(uart_port);
/*
Table 835. USART Fractional Divider Register:
UARTbaudrate = PCLK / ( 16* (((256*DLM)+ DLL)*(1+(DivAddVal/MulVal))) )
The value of MULVAL and DIVADDVAL should comply to the following
conditions:
1. 1 <= MULVAL <= 15
2. 0 <= DIVADDVAL <= 14
3. DIVADDVAL < MULVAL
*/
/* Set DLAB Bit */
UART_LCR(uart_port) |= UART_LCR_DLAB_EN;
UART_DLM(uart_port) = UART_LOAD_DLM(uart_divisor);
UART_DLL(uart_port) = UART_LOAD_DLL(uart_divisor);
/* Clear DLAB Bit */
UART_LCR(uart_port) &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
UART_FDR(uart_port) = UART_FDR_BITMASK &
(UART_FDR_MULVAL(uart_mulval) | UART_FDR_DIVADDVAL(uart_divaddval));
/* Read LCR config & Force Enable of Divisor Latches Access */
lcr_config = (UART_LCR(uart_port) & UART_LCR_DLAB_EN) &
UART_LCR_BITMASK;
lcr_config |= data_nb_bits; /* Set Nb Data Bits */
lcr_config |= data_nb_stop; /* Set Nb Stop Bits */
lcr_config |= data_parity; /* Set Data Parity */
/* Write LCR (only 8bits) */
UART_LCR(uart_port) = (lcr_config & UART_LCR_BITMASK);
/* Enable TX */
UART_TER(uart_port) = UART_TER_TXEN;
}
/*
* This Function return if data are received or not received.
*/
uart_rx_data_ready_t uart_rx_data_ready(uart_num_t uart_num)
{
uint32_t uart_port;
uint8_t uart_status;
uart_rx_data_ready_t data_ready;
uart_port = uart_num;
uart_status = UART_LSR(uart_port) & 0xFF;
/* Check Error */
if ((uart_status & UART_LSR_ERROR_MASK) == 0) {
/* No errors check if data is ready */
if ((uart_status & UART_LSR_RDR) == 0) {
data_ready = UART_RX_NO_DATA;
} else {
data_ready = UART_RX_DATA_READY;
}
} else {
/* UART Error */
data_ready = UART_RX_DATA_ERROR;
}
return data_ready;
}
/*
* This Function Wait until Data RX Ready, and return Data Read from UART.
*/
uint8_t uart_read(uart_num_t uart_num)
{
uint32_t uart_port;
uint8_t uart_val;
uart_port = uart_num;
/* Wait Until Data Received (Rx Data Not Ready) */
while ((UART_LSR(uart_port) & UART_LSR_RDR) == 0);
uart_val = (UART_RBR(uart_port) & UART_RBR_MASKBIT);
return uart_val;
}
/*
* This Function Wait until Data RX Ready, and return Data Read from UART.
*/
uint8_t uart_read_timeout(uart_num_t uart_num, uint32_t rx_timeout_nb_cycles,
uart_error_t *error)
{
uint32_t uart_port;
uint8_t uart_val;
uint32_t counter;
uart_port = uart_num;
/* Wait Until Data Received (Rx Data Not Ready) */
counter = 0;
while ((UART_LSR(uart_port) & UART_LSR_RDR) == 0) {
if (rx_timeout_nb_cycles > 0) {
counter++;
if (counter >= rx_timeout_nb_cycles) {
*error = UART_TIMEOUT_ERROR;
return 0;
}
}
}
uart_val = (UART_RBR(uart_port) & UART_RBR_MASKBIT);
/* Clear error */
*error = UART_NO_ERROR;
return uart_val;
}
/* This Function Wait Data TX Ready, and Write Data to UART
if rx_timeout_nb_cycles = 0 Infinite wait
*/
void uart_write(uart_num_t uart_num, uint8_t data)
{
uint32_t uart_port;
uart_port = uart_num;
/* Wait Until FIFO not full */
while ((UART_LSR(uart_port) & UART_LSR_THRE) == 0);
UART_THR(uart_port) = data;
}
What am I missing ?
UPD Solved ! Thanks to @romkey to point to decrease baud rate. Will investigate the reason, but no matter ESP supports up to 5MHz, the decreasing BR to 281250 helped to establish comminucation for testing. Later added SCU_CONF_EHS_FAST to pin configuration and achieved 3MHz baud rate. Also another part as I supposed was related to initialization: CLK_M4_UART2 setting - it was disabled, found in the firmware a code that sets to 0 value of this register.
Upvotes: 1
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