CODEWITHSUNDEEP
ctimerstm32halpwm
amirparto
amirparto

Reputation: 23

STM32G4 TIM1 center aligned PWM update event problem

I'm facing an issue with the update event triggering in STM32G4 TIM1. I've configured TIM1 to generate PWM signals and set the update event to Center-Aligned Mode 1. However, I've noticed that the update event is occurring both when the timer's counter reaches the auto-reload value (ARR) and when it reaches zero. This is causing a problem because I specifically need the update event to occur only at ARR to trigger the ADC for sampling.

How can I ensure that the update event occurs only at ARR in this mode?

I have tested with up counting mode and it was triggered the ADC just when it reached to ARR value. But in Center aligned mode it sends the trigger signal in both overflow and underflow event.

Upvotes: 2

Views: 22

Answers (1)

0___________
0___________

Reputation: 67810

The TIMx Repetition Counter Register (TIMx_RCR) in STM32 timers allows you to reduce the frequency of the Update events (UEVs). By default, timers generate an Update event at each overflow or underflow (depending on counting mode).

In your case setting it to 1 will generate the event once per full PWM cycle (on underflow or overflow depending how you start your timer

Upvotes: 1

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