CODEWITHSUNDEEP
makefile
Li Dong
Li Dong

Reputation: 1108

How to avoid repetitive implicit rules in Makefile?

I am working on a Makefile auto-generating software (CodeMate), and I would like to know if I can avoid to write the implicit rules for different file suffices but with the same operations as:

%.o: %.F90
    @echo " Creating dependency $@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)
%.o: %.f90
    @echo " Creating dependency $@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)
%.o: %.F
    @echo " Creating dependency $@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)
%.o: %.f
    @echo " Creating dependency $@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)

This can work well, but is a little ugly.

Thanks!

Upvotes: 1

Views: 280

Answers (1)

eriktous
eriktous

Reputation: 6649

(Untested:)

define f_rule
%.o: %.$(1)
    @echo " Creating dependency $$@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $$< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)
endef

F_EXTENSIONS := F90 f90 F f
$(foreach ext, $(F_EXTENSIONS), $(eval $(call f_rule,$(ext))))

Upvotes: 1

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