Makefile variable expansion/evaluation

Question

Currently I am facing an issue with my Makefile caused by evaluation of a make variable. I have reduced the complexity, only the essential elements remain that produce the issue.

• $(LIST) is evaluated as a list of files when the Makefile is read.
• During step1 one of those files is deleted.
• When using the variable in step2 it is not evaluated again and thus not valid any more which leads to an error during the copy command.
• It would be nice if the variable was evaluated at the time it is used, here during step2.

Any ideas how to solve or work around this issue?

---

Makefile:

LIST=$(wildcard src/*.txt)

all: step1 step2

step1:
    @echo "---------- step1 ----------"
    @echo $(LIST)
    rm src/q1.txt
    ls src

step2:
    @echo "---------- step2 ----------"
    @echo $(LIST)
    cp $(LIST) ./dst

---

Execution logging:

$ make
---------- step1 ----------
src/q1.txt src/q2.txt
rm src/q1.txt
ls src
q2.txt
---------- step2 ----------
src/q1.txt src/q2.txt
cp src/q1.txt src/q2.txt ./dst
cp: cannot stat `src/q1.txt': No such file or directory
make: *** [step2] Error 1

Answer 1

Don't use the wildcard function.

LIST = src/*.txt

all: step1 step2

step1:
    @echo "---------- step1 ----------"
    @echo $(LIST)
    rm src/q1.txt
    ls src

step2:
    @echo "---------- step2 ----------"
    @echo $(LIST)
    cp $(LIST) ./dst