CODEWITHSUNDEEP
shellmakefile
Lefsler
Lefsler

Reputation: 1768

Makefile define variable using if

I'm trying to do something like it

@if[[ 1==1 ]] then;\
   COMPILER_CMD = -fPic;\
fi;

But if i call in the next line the variable it don't work. If i define it outside the if it works perfect. Someone can help me?

Upvotes: 0

Views: 4340

Answers (3)

Beta
Beta

Reputation: 99174

As everyone is saying, you haven't given us enough information. But I'll make a guess. You want to set this variable conditionally, then use it elsewhere in the makefile, and in other makefiles which include this one.

The trouble is that you are trying to use shell syntax. In a command this will work (if the syntax is correct), but the value will apply only in that command. Outside commands, shell syntax is just wrong and will cause an error, malfunction, or be ignored depending on exactly what you do.

Try this in the makefile, outside of any rule (that is, not in the recipe for any particular target):

ifeq (1,1)
COMPILER_CMD = -fPic
endif

$(info $(COMPILER_CMD))

If that works, then you can try to adapt it to do whatever it is you're actually trying to do.

Upvotes: 3

MadScientist
MadScientist

Reputation: 101081

I'm assuming that the example you show is the recipe for some rule. By the syntax here it looks like you're trying to set a make variable COMPILER_CMD from within a recipe based on the value of some shell boolean test, which is of course impossible. You have to be very clear in your mind how make works: make is not interpreting the recipes you write, in any way. Make is simply passing those recipes to another program (the shell) and the other program is interpreting those commands. Thus, you can't change the behavior of make, including setting make variables, from within a recipe: that recipe is being run in a completely different program.

As others have said, you don't give enough information about what you REALLY want to do, at a higher level, for us to give a complete solution. Having a boolean like 1==1 doesn't give any hint whatsoever as to why you're doing this. Also your shell syntax contains syntax errors, so we can tell you didn't actually cut and paste this from a real, working example.

You can, as piokuc implies, use a shell variable COMPILER_CMD (you have to remove the whitespace around the = to make it a shell variable assignment) but that value takes effect only while that one recipe line is running. For the next recipe line a new shell is started and any values set in the previous shell are lost:

all:
        @ if [[ 1 == 1 ]]; then COMPILER_CMD=-fpic; fi; \
          echo COMPILER_CMD=$$COMPILER_CMD
        @ echo COMPILER_CMD=$$COMPILER_CMD

will give:

COMPILER_CMD=-fpic
COMPILER_CMD=

Upvotes: 0

piokuc
piokuc

Reputation: 26204

Each line in the Makefile is executed separately in a new shell process, so that's why changes you made to the environment are not propagated to next line.

You can combine both lines into one long one to achieve what you want. You probably have something like this in you Makefile:

@if[[ 1==1 ]] then;\
   COMPILER_CMD = -fPic;\
fi;
echo $COMPILER_CMD

You want to add the line continuation backslash to the line before echo:

@if[[ 1==1 ]] then;\
   COMPILER_CMD = -fPic;\
fi; \
echo $COMPILER_CMD

Upvotes: 1

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