CODEWITHSUNDEEP
makefile
Dean
Dean

Reputation: 8978

make: *** No rule to make target `all'. Stop

I keep getting this error:

make: *** No rule to make target `all'.  Stop.

Even though my make file looks like this: 

CC=gcc
CFLAGS=-c -Wall

all: build

build: inputText.o outputText.o main.o
    gcc main.o inputText.o outputText.o -o main

main.o: main.c
    $(CC) $(CFLAGS) main.c -o main.o

inputText.o: inputText.c
    $(CC) $(CFLAGS) inputText.c -o inputText.o

outputText.o: outputText.c
    $(CC) $(CFLAGS) outputText.c -o outputText.o

Yes there should be a tab space underneath the target and there is in my make file.

I can get it to work if I try one of the targets like main.o, inputText.o and outputText.o but can't with either build or all.

EDIT: I just randomly tried running make and telling it the file using the following command: 

make -f make

This works but why doesn't just typing make work?

Upvotes: 36

Views: 176584

Answers (1)

Paul R
Paul R

Reputation: 212929

Your makefile should ideally be named makefile, not make. Note that you can call your makefile anything you like, but as you found, you then need the -f option with make to specify the name of the makefile. Using the default name of makefile just makes life easier.

Upvotes: 33

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