StackOverflow Questions for Tag: persistent-memory

Martim Afonso

Reputation: 1

How to set up a persistent memory block device on a Docker container?

dockerpersistent-memory

Score: 0

Answers: 0

Vishal Deka

Reputation: 53

Are POSIX IO operations read() and write() compatible with DAX file system?

intelpersistent-memory

Score: 0

Answers: 0

novaura

Reputation: 1

How to ensure I am programming on persistent memory

cpartitioningpersistent-memory

Score: 0

Answers: 1

Louis Jenkins

Reputation: 391

How to read stale values on x86

linuxcachingx86dmapersistent-memory

Score: 4

Answers: 1

dangzzz

Reputation: 199

What is the latency of `clwb` and `ntstore` on Intel's Optane Persistent Memory?

x86-64intelcpu-architecturepersistent-memory

Score: 1

Answers: 2

Ashikee AbHi

Reputation: 395

Do I need to externally call flush if using cuda api to copy from GPU Memory to Persistent Memory?

cudacpu-architectureflushpersistent-memoryclflush

Score: 2

Answers: 2

dangzzz

Reputation: 199

On x86-64, is the “movnti” or "movntdq" instruction atomic when system crash?

x86-64atomiccpu-architecturessepersistent-memory

Score: 5

Answers: 1

iwannarest

Reputation: 1

is there any way get access persistent memory in linux?

clinuxkernelpersistent-memory

Score: 0

Answers: 2

dangzzz

Reputation: 199

Is clflush or clflushopt atomic when system crash？

cx86-64atomicpersistent-memoryclflush

Score: 5

Answers: 2

Arun Kp

Reputation: 422

Does clwb take care of the write in store buffer?

assemblyx86x86-64cpu-architecturepersistent-memory

Score: 3

Answers: 2

Martijn

Reputation: 606

Why does CLFLUSH exist in x86?

x86cpu-architecturecpu-cachecache-invalidationpersistent-memory

Score: 14

Answers: 1

Arun Kp

Reputation: 422

clwb+sfence, can we remove sfence if writes are cache-line aligned?

x86x86-64intelpersistent-memory

Score: 0

Answers: 1

galym

Reputation: 153

(Persistence) ordering of Intel non-temporal stores to the same cache line

x86cpu-architecturememory-barrierspersistent-memory

Score: 5

Answers: 1

Ana Khorguani

Reputation: 926

Intel's CLWB instruction invalidating cache lines

x86intelcpu-architecturecpu-cachepersistent-memory

Score: 8

Answers: 1

AdvSphere

Reputation: 986

Persistent memory cache policy to write and read

x86intelcpu-cachepersistent-storagepersistent-memory

Score: 2

Answers: 1

Wentao Huang

Reputation: 43

how to use non-temporal (streaming) store instructions to store a self-defined struct?

c++cx86intelpersistent-memory

Score: 0

Answers: 1

Louis Jenkins

Reputation: 391

How does Linux handle Intel's Optane Persistent Memory Modules under Memory Mode?

performancelinux-kernelintelcpu-architecturepersistent-memory

Score: 2

Answers: 1

TOM ZHANG

Reputation: 65

Failed mounting to Persistent-Memory-Backed local persisten volume in kubernetes 1.20

kubernetespersistent-volumespersistent-memory

Score: 1

Answers: 1

dangzzz

Reputation: 199

Why “movnti” followed by an “sfence” guarantees persistent ordering？

x86cpu-architecturememory-barrierspersistent-memory

Score: 4

Answers: 1

idle_cycles

Reputation: 173

How does DC PMM (memory mode) cache coherence behave?

x86intelcpu-architecturecpu-cachepersistent-memory

Score: 4

Answers: 1

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StackOverflow Questions for Tag: persistent-memory

How to set up a persistent memory block device on a Docker container?

Are POSIX IO operations read() and write() compatible with DAX file system?

How to ensure I am programming on persistent memory

How to read stale values on x86

What is the latency of `clwb` and `ntstore` on Intel&#39;s Optane Persistent Memory?

Do I need to externally call flush if using cuda api to copy from GPU Memory to Persistent Memory?

On x86-64, is the “movnti” or &quot;movntdq&quot; instruction atomic when system crash?

is there any way get access persistent memory in linux?

Is clflush or clflushopt atomic when system crash？

Does clwb take care of the write in store buffer?

Why does CLFLUSH exist in x86?

clwb+sfence, can we remove sfence if writes are cache-line aligned?

(Persistence) ordering of Intel non-temporal stores to the same cache line

Intel&#39;s CLWB instruction invalidating cache lines

Persistent memory cache policy to write and read

how to use non-temporal (streaming) store instructions to store a self-defined struct?

How does Linux handle Intel&#39;s Optane Persistent Memory Modules under Memory Mode?

Failed mounting to Persistent-Memory-Backed local persisten volume in kubernetes 1.20

Why “movnti” followed by an “sfence” guarantees persistent ordering？

How does DC PMM (memory mode) cache coherence behave?

What is the latency of `clwb` and `ntstore` on Intel's Optane Persistent Memory?

On x86-64, is the “movnti” or "movntdq" instruction atomic when system crash?

Intel's CLWB instruction invalidating cache lines

How does Linux handle Intel's Optane Persistent Memory Modules under Memory Mode?