CODEWITHSUNDEEP
c++cmultithreadinglock-freememory-barriers
anon
anon

Reputation:

Memory barriers in userspace? (Linux, x86-64)

It is easy to set memory barriers on the kernel side: the macros mb, wmb, rmb, etc. are always in place thanks to the Linux kernel headers.

How to accomplish this on the user side?

Upvotes: 18

Views: 13310

Answers (8)

W.Sun
W.Sun

Reputation: 868

Simply borrowing barriers defined for Linux kernel, just add those macros to your header file: http://lxr.linux.no/#linux+v3.6.5/arch/x86/include/asm/barrier.h#L21 . And of course, give Linux developers credit in your source code.

Upvotes: 0

cmccabe
cmccabe

Reputation: 4320

Use libatomic_ops. http://www.hpl.hp.com/research/linux/atomic_ops/

It's not compiler-specific, and less buggy than the GCC stuff. It's not a giganto-library that provides tons of functionality you don't care about. It just provides atomic operations. Also, it's portable to different CPU architectures.

Upvotes: 4

Rick
Rick

Reputation: 147

The Qprof profiling library (nothing to do with Qt) also includes in its source code a library of atomic operations, including memory barriers. They work on many compilers and architectures. I'm using it on a project of mine.

http://www.hpl.hp.com/research/linux/qprof/download.php4

Upvotes: 2

osgx
osgx

Reputation: 94175

__sync_synchronize() in GCC 4.4+

The Intel Memory Ordering White Paper, a section from Volume 3A of Intel 64 and IA-32 manual http://developer.intel.com/Assets/PDF/manual/253668.pdf

Upvotes: 2

Marc Mutz - mmutz
Marc Mutz - mmutz

Reputation: 25283

The include/arch/qatomic_*.h headers of a recent Qt distribution include (LGPL) code for a lot of architectures and all kinds of memory barriers (acquire, release, both).

Upvotes: 0

Ira Baxter
Ira Baxter

Reputation: 95324

Linux x64 means you can use the Intel memory barrier instructions. You might wrap them in macros similar to those in the Linux headers, if those macros aren't appropriate or accessible to your code

Upvotes: 2

Martin v. Löwis
Martin v. Löwis

Reputation: 127447

Posix defines a number of functions as acting as memory barriers. Memory locations must not be concurrently accessed; to prevent this, use synchronization - and that synchronization will also work as a barrier.

Upvotes: 6

nik
nik

Reputation: 13450

You are looking for the full memory barrier atomic builtins of gcc.

Please note the detail on the reference i gave here says,

The [following] builtins are intended to be compatible with those described in the Intel Itanium Processor-specific Application Binary Interface, section 7.4. As such, they depart from the normal GCC practice of using the “__builtin_” prefix, and further that they are overloaded such that they work on multiple types.

Upvotes: 6

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