CODEWITHSUNDEEP
architecturex86x86-64cpu-architecture
user1261701
user1261701

Reputation: 79

Total Store Order and write merging in x86(-64)

I was learning about TSO (the Total Store Order Consistency model) and read that computer architecture researchers believe that Intel x86 (x86-64) processors implement this consistency model.

(Assuming this to be true, that they do implement TSO) Would this mean the x86(-64) Intel processors do not (and cannot) perform write merging? But in the book by Patterson and Hennessy they mention that the core i7 does write merging.

The reason I ask this is because if they allow write merging, then that could potentially violate TSO (write-write). So then Intel processors cannot implement TSO.

Where is the error that I'm making with respect to this?

Upvotes: 3

Views: 1463

Answers (1)

Leeor
Leeor

Reputation: 19706

Write merging does not violate TSO as it's performed for consecutive stores (aside from write merging done on write-combining mem type which is less restrictive but doesn't guarantee the normal memory ordering), no store is being reordered, just grouped together.
Also note that memory ordering relates to the separate elements (the stores themselves), while the merging is only done with regards to the outside world (lower caches and memory), so we're talking about completely different HW structures here.

See here for a good explanation on how write combining is done - what is a store buffer?

Upvotes: 2

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