CODEWITHSUNDEEP
gccmakefiledependencies
lithetails
lithetails

Reputation: 43

Generating dependencies for gcc

I'm writing a Makefile to compile a very long project. Basicaly, I've defined the all objects I need. The problem comes when I need to generate the dependencies. I'm doing something like this:

a.o: $( $(CXX) -MM $(INCLUDE) A/a.cpp | sed 's/a.o: //')
 $(CXX) $(CXXFLAGS) $(INCLUDES) A/a.cpp

b.o: $( $(CXX) -MM $(INCLUDE) A/b.cpp | sed 's/b.o: //')
 $(CXX) $(CXXFLAGS) $(INCLUDES) A/b.cpp

libab.a: a.o b.o
 $(LXX) $(LXXFLAGS) libab.a a.o b.o

The output of $(CXX) -MM $(INCLUDE) A/a.cpp | sed 's/a.o: //' lists all dependencies that a.cpp needs to be compilated so I'm trying to put the output of this command like dependencies when I'm declaring the object but it's not working.

Do you have an idea about how to do it?

Thanks.

Upvotes: 4

Views: 7887

Answers (1)

sehe
sehe

Reputation: 392793

Why are you trying to remove the target prefix which is exactly what you already had typed manually?

Instead just include the whole dependency files.

-include $(ALL_CPP_FILES:%.cpp=%.d)

My usual flags to automatically generate the .d (dependency) files is:

CPPFLAGS+=-MMD    # automatic .d dependency file generation

This is like -MD, except it mentions only user header files, not system header files.

Sample:

# BUILD=RELEASE

PRJNAME=demo
#
TARGETS+=bin/test

build: \
    $(TARGETS) \
    tags

all: build

clean:
    rm -rf bin/* $(ALL_OBJ_FILES)
    rm -rf $(ALL_CPP_FILES:%.cpp=%.d)

##############################
# definition
CC=gcc
CXX=g++

CPPFLAGS+=-MMD    # automatic .d dependency file generation
CPPFLAGS+=-std=c++11

ifeq ($(BUILD),RELEASE)
    CPPFLAGS+=-g -O3
    CPPFLAGS+=-march=native
else
    CPPFLAGS+=-g -O0
    CPPFLAGS+=-DDEBUG -D_DEBUG
    CPPFLAGS+=-DUNIT_TESTS
endif

CPPFLAGS+=-Wall -Wextra -pedantic
#CPPFLAGS+=-Werror

LDFLAGS+=-lpthread

ALL_CPP_FILES=A/a.cpp A/b.cpp
ALL_OBJ_FILES=$(patsubst %.cpp,%.o,$(ALL_CPP_FILES))

##############################
tags: $(ALL_CPP_FILES)
    ctags -R A/

%.o: %.cpp
    $(CXX) -c $(CPPFLAGS) $< -o $@

##############################
# tool targets
bin/test: $(ALL_OBJ_FILES)
    mkdir -pv $(@D)
    $(CXX) $^ $(LDFLAGS) -o $@

.PRECIOUS: S(ALL_OBJ_FILES)
.PHONY: clean all build

-include $(ALL_CPP_FILES:%.cpp=%.d)

Upvotes: 5

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