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makefile
Ibrahim Quraish
Ibrahim Quraish

Reputation: 4099

Makefile clean all target is called twice when explicitly invoked

I am still figuring out why in the below Makefile, when I execute it in the command like make clean all it runs twice the "clean all" target part?

FLAGS = -g -Wall -Wextra -Werror

a.out : check.cpp
    $(CXX) $(CFLAGS) -o $@ $< 

clean all:
    rm -rf *.o *.out *.txt

Upvotes: 0

Views: 690

Answers (1)

Xavier Leclercq
Xavier Leclercq

Reputation: 323

The target "clean all:" is equivalent to:

clean:
        rm -rf *.o *.out *.txt
all:
        rm -rf *.o *.out *.txt

You can't have spaces in target names, each word would be considered a target. So when you do make clean all, make thinks you want to build target "clean" and target "all" and so you have 2 targets being executed. It does look like a mistake in the makefile since having all doing the same as clean is weird.

Upvotes: 3

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