Indra Lascu
Indra Lascu

Reputation: 51

Triple fault when setting IA32 EFER.LME

We are working on an educational operating system called Pintos, trying to set it up to support Virtualization. We start with the version running on 32 bits and our first step would be to switch to 64bit mode and continue from there. We're running Pintos via Bochs.

We have looked up the steps to do this in Intel Programmer's Manual ( chapter 9.8.5, volume 3) and when we want to set the IA32 EFER.LME bit to 1, in order to enable IA32e mode, the system generates a triple fault and starts working from the beginning once again.

Here's the code we've been working on.

#Step 1: Disable paging CR0_PG = 0. Use MOV CR0 instr. to disable paging (instr. must be located in an identity-mapped page.
    movl %cr0, %eax
    andl $0x7fffffff, %eax
    movl %eax, %cr0

#Step 2: Enable physical-address extensions by setting CR4_PAE = 1
    movl %cr4, %eax
    orl $CR4_PAE, %eax
    movl %eax, %cr4

#Step 3: Load CR3 with the physical base address of the level 4 page map table PML4
    movl $0xe000, %eax
    movl %eax, %cr3

    xchg %bx, %bx
#Step 4: Enable IA-32e mode by setting IA32_EFER_LME = 1
    movl $0xc0000080, %ecx
    rdmsr
    or $IA32_EFER_LME, %eax
    wrmsr

#Step 5: Enable paging CR0_PG = 1.
    movl %cr0, %eax
    orl $CR0_PG, %eax
    movl %eax, %cr0

We've tried setting up our own TSS because out of all the possible cases suggested by Intel that may generate a triple fault, this one seemed the only reasonable cause.

Any ideas why the triple fault is being generated? All seems clear and the steps are followed, still the kernel panic attack occurs.

Upvotes: 4

Views: 709

Answers (1)

Indra Lascu
Indra Lascu

Reputation: 51

We have finally managed to solve this annoying problem. It turned out that the virtual machine we used to emulate Pintos, bochs, was not configured to run on 64-bit mode. Once the correct configurations have been made, it worked on the first try.

Upvotes: 1

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