CODEWITHSUNDEEP
performancecachingoptimizationcpu-architecture
Peng Zhang
Peng Zhang

Reputation: 3585

Size of neighbouring data a modern computer caches for locality favour

I have a continuous memory of 1024 buffers, each buffer sizes 2K bytes. I use a linked list to keep record of available buffers (Buffer here can be thought of being used by Producer and Consumer). After some operations, the order of buffers in the link list becomes random.

The modern computer architecture favours compact data, locality a lot. It caches neighbouring data when a location needs to be accessed. The cache-line of my computer is 64(corrected from 64K) bytes.

Question 1. For my case, is there a lot of cache misses due to my access pattern is random?

Question 2. What is the size of neighbouring data a modern computer caches? I think if you access a location in an array of integers, it will cache neighbouring integers. But my unit data (2K) is much larger than int (4). So, I am not sure how many neighbours will be cached.

Upvotes: 2

Views: 89

Answers (1)

VAndrei
VAndrei

Reputation: 5590

First of all I doubt that "The cache-line of my computer is 64K bytes". It's most likely to be 64 Bytes only. Let me try to answer your questions:

Question 1. For my case, is there a lot of cache misses due to my access pattern is random?

Not necessarily. It depends on how many operations you do on a buffer once it is cached.

  • So if you cache a 2K buffer and do lots of sequential work on it your cache hit rate would be good. As Paul suggested, this works even better with hardware prefetching enabled.
  • However if you constantly jump between buffers and do relatively low amount of work on each buffer, the cache hit rate will drop. However 1024 x 2KB = 2MB so that could be a size for an L2 cache (if you have also L3, then L2 is generally smaller). So even if you miss L1, there's a high chance that in both cases you will hit L2.

Question 2. What is the size of neighbouring data a modern computer caches?

Usually the number of neighbors fetched is given by the cache line size. If the line size is 64B, you could fetch 16 integer values. So on each read, you fill a cache line. However you need to take into consideration prefetching. If your CPU detects that the memory reads are sequential, it will prefetch more neighbors and bring more cache lines in advance.

Hope this helps!

Upvotes: 3

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