CODEWITHSUNDEEP
vhdl
mmron
mmron

Reputation: 1

debounce code of a mecanique switch in vhdl

I need to use a counter to count the number of glitch signal and the width of glitch respectively, can I use a up counter process to resolve both issue as one as below for edge:

counterC1 : process (clk, reset, clr) 
--variable count : integer RANGE 0 TO 4 ;
begin
      if (reset='1') then
         r_regC1 <= (others=>'0');
      elsif (clk'event and clk ='1') then
         r_regC1 <= r_nextC1;
      end if;

end process;
   -- next-state logic
   r_nextC1 <= (others=>'0') when reset = '1' or clr = '1' else
             r_regC1 + 1 when (sw_tick'event and sw_tick = '1') else
             r_regC1;
            --sw_tick is glitch by rebound
   -- output logic
   qC1 <= std_logic_vector(r_regC1);

how to identify the counter to count the transition edge or to count the larger of whole impulsion? any advice?

Thank you!

Upvotes: 0

Views: 158

Answers (1)

Kevin Thibedeau
Kevin Thibedeau

Reputation: 3421

This would be a better question for the EE site.

First you should synchronize the external signal through a pair of flip-flops. This ensures it is synchronous to the clock domain. Then whenever the synchronized signal changes you reset a down-counter. If the counter reaches 0 then the signal has been stable long enough to consider it glitch free and you can set the debounced signal to the new state.

Upvotes: 1

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