Why Make doesn't recognize my variable?

Question

I have a short Make script, which works if I put the Build directory in as a string manually myself instead of as a variable:

CC = gcc
CFLAGS = -O2 -g -Wall -fmessage-length=0
LDFLAGS =
SRCDIR = Src
BUILDDIR = Build 
SRCS = $(SRCDIR)/Main.c
OBJS = $(SRCS:.c=.o)
LIBS =
TARGET = HelloWorld

all: dir $(SRC) Build/$(TARGET)

dir:
    mkdir -p $(BUILDDIR)

Build/$(TARGET): $(OBJS) 
    $(CC) $(LDFLAGS) $(OBJS) -o $@

$(SRCDIR).c.o:
    $(CC) $(CFLAGS) $< -o $@

clean:
    rm -f $(OBJS) $(TARGET)

It stops working with the error message:

make: *** No rule to make target `/HelloWorld', needed by `all'.  Stop.

when I replace the line:

all: dir $(SRC) Build/$(TARGET)

with:

all: dir $(SRC) $(BUILDDIR)/$(TARGET)

Why is Make not substituting the $(BUILDDIR) clause with Build?

Answer 1

In your code there is a space after Build

BUILDDIR = Build