CODEWITHSUNDEEP
makefile
user5184385
user5184385

Reputation:

A variable is defined in makefile but Make ignores it. Why?

From the docs:

There is one more special feature of target-specific variables: when you define a target-specific variable that variable value is also in effect for all prerequisites of this target, and all their prerequisites, etc. (unless those prerequisites override that variable with their own target-specific variable value).

So, given a makefile:

$(shell rm -rf x D)
$(shell mkdir D)
$(shell touch D/x)

VPATH = D

all: x ;

x ::
    @echo 'foo is: $(foo)'

.SILENT : D/x

all : foo = bar

Running, I get:

foo is:

And I thought, that I defined above: foo = bar!

Or, did I?

Upvotes: 2

Views: 87

Answers (1)

jmlemetayer
jmlemetayer

Reputation: 4952

In fact you have a mix with VPATH, Double-Colon Rules, Target-specific Variable Values and Special Built-in Target Names.

Your Makefile can be interpreted as:

  • all is the first target
  • all have one prerequisite: x
  • As VPATH is D, all have also an indirect prerequisite: D/x
  • The D/x target is silent
  • all and all these prerequisites have a target specific variable foo equal to bar

It seems that the indirect prerequisite D/x is not taken into account for the target specific thing.

Interresting test: Add x : foo = bar at the end of your Makefile and the makeprocess will be stuck...

Workarounds:

  1. Remove the .SILENT line (I found this after some tests, it also fix the issue above...)
  2. Add D/x : foo = bar at the end of your Makefile to explicitely add the foo variable for the D/xtarget

Upvotes: 1

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