CODEWITHSUNDEEP
cpu-architecture
고지웅
고지웅

Reputation: 123

Datapath for a jump instruction(MIPS)

Recently, I have studied Datapath for R-type,load, store, branch Instruction,jump. On control signal session,

-Jump-

RegDst : don't care

ALUSrc : don't care

MentoReg : don't care

RegWrite : 0

MemRead : 0

MemWrite :0

Branch : don't care

ALUOp : don't care.

jump : 1

I can't understand why RegWrite,MemRead,Memwrite have '0' value. I think these three signals have to be don't care, since none of the data flow Registers,Datamemory. Could you explain why they got '0' value?

Upvotes: 0

Views: 2077

Answers (1)

Tayyar R
Tayyar R

Reputation: 685

From what you provided, it seems like RegWrite is the enable control signal for register file (setting it to 1 would write a value into a register on the clock edge), while MemRead and MemWrite are probably the control signals that dispatch a request to either the cache or the memory system to fetch a data block. When executing a jump you don't want to write any register and you don't want to generate any memory system request, so that's why these control signals are set to '0' instead of don't care.

Upvotes: 2

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