Reputation: 57718
On our embedded platform, some devices have a 16-bit data bus (such as the FPGA). However, we need to read them as 32-bit values (such as 32-bit floating point).
My understanding is that when the 16-bit memory is accessed by a 32-bit data load instruction (LDR), the ARM processor will perform 2 16-bit fetches to assemble a 32-bit quantity.
Is this correct?
For example, I would like the ARM processor to load a uint32_t
value from the device with 16-bit data bus without having to make 2 uint16_t
reads then combine the uint16_t
values into one uint32_t
variable.
Do we need to explicitly fetch as 2 16-bit quantities and then assemble as a 32-bit quantity?
What ARM documents contain this clarification?
Are there any specific ARM configuration settings for the ARM to make 2 fetches from a 16-bit data bus to form a 32-bit quantity (in a register)?
FYI: We are using an ARM Cortex A8 and the IAR EW IDE/Compiler.
The platform is running is "system" mode and not "thumb" mode.
Upvotes: 2
Views: 1954
Reputation: 3729
If you are accessing memory, when the CPU required 32-bit of memory, it will request it directly (Cortex-A8 does not support 16-bit busses). Some peripheral (In the system) is responsible for converting the 32-bit request to 16-bit to adapt to the bus (Doing 2 transfers).
It means that for the CPU is should be totally transparent.
Upvotes: 0