CODEWITHSUNDEEP
vhdl
SomeRandomPhysicist
SomeRandomPhysicist

Reputation: 1599

Using If condition to do "something" once every 10 clock cycles. what if "something" takes more than 1 clock cycle?

I am working on some VHDL code that will be used (on an FPGA) to read in a 16 bit digital signal, do some processing, and then write out the 16 bit processed signal. Currently it is setup so it should read the input every 10 clock cycles, do some processing on the next clock cycle (it currently does nothing, just outputs the input) and then just increment the counter for the remaining 8 clock cycles.

What happens if the processing takes longer than one clock cycle to complete (Which it will), will it continue until it finishes and stop the counter incrementing until it does? Or will the counter keep incrementing in parallel while it processes the signal?

I will set it up such that the process completes before the 8 clock cycles are up (in time to be written to the output).

The pseudocode looks something like this:

Do (on rising clock edge):
if (n = 10) then
  n <= 1;
  Output <= ProcessedSignal;
  InputSignal <= Input;
elsif (n = 1) then
  n <= n + 1
  Output <= Output;
  -- do some signal processing here (e.g. a filter)
  ProcessedSignal <= InputSignal;
else
  n <= n + 1;
  Output <= Output;
  ProcessedSignal <= ProcessedSignal;
end if;

Upvotes: 0

Views: 1780

Answers (1)

pc3e
pc3e

Reputation: 1369

It all depends on how you write the code; any kind of behavior is possible. Your pseudocode is nearly valid VHDL and will do what you want if I understand you correctly. Here is a suggestion for real code: (without architecture/signal declarations, also missing reset)

process (clock)
begin
  if rising_edge(clock) then
    n <= n + 1; -- default assignment

    if (n = 10) then
      n <= 1; -- overrides default assignment
      Output <= ProcessedSignal;
      InputSignal <= Input;
    elsif (n = 1) then
      -- do some signal processing here (e.g. a filter)
      ProcessedSignal <= InputSignal;
    elsif (n = 2) then
      -- do more processing
    end if;
  end if;
end process;

Note that there is no need to write a signal to itself in a clocked process, unless you want to make it explicit that the signal keeps its old value.

Upvotes: 1

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